XC56309AG100A Freescale Semiconductor, XC56309AG100A Datasheet - Page 92

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XC56309AG100A

Manufacturer Part Number
XC56309AG100A
Description
IC DSP 24BIT 100MHZ 144-TQFP
Manufacturer
Freescale Semiconductor
Series
DSP563xxr
Type
Fixed Pointr
Datasheet

Specifications of XC56309AG100A

Interface
Host Interface, SSI, SCI
Clock Rate
100MHz
Non-volatile Memory
ROM (576 B)
On-chip Ram
24kB
Voltage - I/o
3.30V
Voltage - Core
3.30V
Operating Temperature
-40°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Core Configuration
4.9 JTAG Identification (ID) Register
The JTAG ID register is a 32-bit read-only factory-programmed register that distinguishes the
component on a board according to the IEEE 1149.1 standard. Figure 4-11 shows the JTAG ID
register configuration. Version information corresponds to the revision number ($0 for revision 0,
$1 for revision A, and so forth).
I)
4.10 JTAG Boundary Scan Register (BSR)
The BSR in the DSP56309 JTAG implementation contains bits for all device signals, clock pins,
and their associated control signals. All bidirectional pins have a corresponding register bit in the
BSR for pin data and are controlled by an associated control bit in the BSR. For details on the
BSR, consult the DSP56300 Family Manual. For the latest description of the BSR contents by
available package type in boundary scan description language (BSDL), call your local Freescale
Semiconductor Sales Office or authorized distributor or visit the Freescale Semiconductor web
site listed on the back cover of this manual.
4-34
31
Version Information
0101
Figure 4-11. JTAG Identification Register Configuration (Revision E)
28
Design Center
27
Number
000110
DSP56309 User’s Manual, Rev. 1
22
21
0000000011
Sequence
Number
12
11
Manufacturer
00000001110
Identity
Freescale Semiconductor
1
0
1
1

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