EP1S10F484C7N Altera, EP1S10F484C7N Datasheet - Page 163
![IC STRATIX FPGA 10K LE 484-FBGA](/photos/6/72/67258/544-484-fbga_sml.jpg)
EP1S10F484C7N
Manufacturer Part Number
EP1S10F484C7N
Description
IC STRATIX FPGA 10K LE 484-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F780C7.pdf
(276 pages)
Specifications of EP1S10F484C7N
Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
335
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
10570
# I/os (max)
335
Frequency (max)
420.17MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
10570
Ram Bits
920448
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
FC-FBGA
No. Of Macrocells
10570
Family Type
Stratix
No. Of I/o's
335
Clock Management
DLL, PLL
I/o Supply Voltage
3.6V
Operating Frequency Max
420MHz
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1S10F484C7N
Manufacturer:
ALTERA
Quantity:
455
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Altera Corporation
July 2005
While in the factory configuration, the factory-configuration logic
performs the following operations:
■
■
■
The user watchdog timer is a counter that must be continually reset
within a specific amount of time in the user mode of an application
configuration to ensure that valid configuration occurred during a remote
update. Only valid application configurations designed for remote
update can reset the user watchdog timer in user mode. If a valid
application configuration does not reset the user watchdog timer in a
specific amount of time, the timer updates a status register and loads the
factory configuration. The user watchdog timer is automatically disabled
for factory configurations.
If an error occurs in loading the application configuration, the
configuration logic writes a status register to specify the cause of the error.
Once this occurs, the Stratix device automatically loads the factory
configuration, which reads the status register and determines the reason
for reconfiguration. Based on the reason, the factory configuration will
take appropriate steps and will write the remote update control register
to specify the next application configuration page to be loaded.
When the Stratix device successfully loads the application configuration,
it enters into user mode. The Stratix device then executes the main
application of the user. Intellectual property (IP), such as a Nios
ISA) and Nios
device determine when remote update is coming. The Nios embedded
processor or user logic receives incoming data, writes it to the
configuration device, and loads the factory configuration. The factory
configuration will read the remote update status register and determine
the valid application configuration to load.
remote update.
update mode.
Loads a remote update-control register to determine the page
address of the new application configuration
Determines whether to enable a user watchdog timer for the
application configuration
Determines what the watchdog timer setting should be if it is
enabled
®
II (32-bit ISA) embedded processors, can help the Stratix
Figure 3–3
shows the transition diagram for remote
Stratix Device Handbook, Volume 1
Figure 3–2
Configuration & Testing
shows the Stratix
®
(16-bit
3–9
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