EP1AGX90EF1152C6 Altera, EP1AGX90EF1152C6 Datasheet - Page 53
EP1AGX90EF1152C6
Manufacturer Part Number
EP1AGX90EF1152C6
Description
IC ARRIA GX FPGA 90K 1152FBGA
Manufacturer
Altera
Series
Arria GXr
Datasheet
1.EP1AGX20CF484C6N.pdf
(234 pages)
Specifications of EP1AGX90EF1152C6
Number Of Logic Elements/cells
90220
Number Of Labs/clbs
4511
Total Ram Bits
4477824
Number Of I /o
538
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
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Part Number:
EP1AGX90EF1152C6
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ALTERA
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Chapter 2: Arria GX Architecture
MultiTrack Interconnect
Figure 2–41. C4 Interconnect Connections
Note to
(1) Each C4 interconnect can drive either up or down four rows.
© December 2009 Altera Corporation
Figure
2–41:
Adjacent LAB can
drive onto neighboring
LAB's C4 interconnect
Row
Interconnect
C16 column interconnects span a length of 16 LABs and provide the fastest resource
for long column connections between LABs, TriMatrix memory blocks, DSP blocks,
and IOEs. C16 interconnects can cross M-RAM blocks and also drive to row and
column interconnects at every fourth LAB. C16 interconnects drive LAB local
interconnects via C4 and R4 interconnects and do not drive LAB local interconnects
directly. All embedded blocks communicate with the logic array similar to
LAB-to-LAB interfaces. Each block (that is, TriMatrix memory and DSP blocks)
connects to row and column interconnects and has local interconnect regions driven
by row and column interconnects. These blocks also have direct link interconnects for
fast connections to and from a neighboring LAB. All blocks are fed by the row LAB
clocks, labclk[5..0].
Interconnect
(Note 1)
Local
C4 Interconnect
Driving Down
Arria GX Device Handbook, Volume 1
C4 Interconnect
Drives Local and R4
Interconnects
up to Four Rows
C4 Interconnect
Driving Up
LAB
2–47
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