ADE7566ASTZF8 Analog Devices Inc, ADE7566ASTZF8 Datasheet - Page 82

• Manufacturer Part Number: ADE7566ASTZF8
• Description: IC ENERGY METER MCU 8K 64LQFP
• Manufacturer: Analog Devices Inc

Specifications of ADE7566ASTZF8

• Applications: Energy Measurement
• Core Processor: 8052
• Program Memory Type: FLASH (8 kB)
• Controller Series: ADE75xx
• Ram Size: 512 x 8
• Interface: I²C, SPI, UART
• Number Of I /o: 20
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Ic Function: Single Phase Energy Measurement IC
• Supply Voltage Range: 3.13V To 3.46V, 2.4V To 3.7V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569
8052 MCU CORE ARCHITECTURE
The ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/
ADE7569 have an 8052 MCU core and use the 8052 instruction
set. Some of the standard 8052 peripherals, such as the UART,
have been enhanced. This section describes the standard 8052
core and enhancements that have been made to it in the
ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569.
The special function register (SFR) space is mapped into the upper
128 bytes of internal data memory space and is accessed by direct
addressing only. It provides an interface between the CPU and
all on-chip peripherals. See Figure 81 for a block diagram of the
programming model for the ADE7116/ADE7156/ADE7166/
ADE7169/ADE7566/ADE7569 via the SFR area.
All registers except the program counter (PC), instruction
register (IR), and the four general-purpose register banks
reside in the SFR area. The SFR registers include control,
configuration, and data registers that provide an interface
between the CPU and all on-chip peripherals.
MCU REGISTERS
The registers used by the MCU are summarized in this section.
Table 56. 8052 SFRs
SFR
ACC
B
PSW
PCON
DPL
DPH
DPTR
SP
CFG
Table 57. Program Status Word SFR (PSW, Address 0xD0)
Bit
7
6
5
[4:3]
2
1
0
Bit Address
0xD7
0xD6
0xD5
0xD4, 0xD3
0xD2
0xD1
0xD0
Address
0xE0
0xF0
0xD0
0x87
0x82
0x83
0x82 and 0x83
0x81
0xAF
Mnemonic
CY
AC
F0
RS1, RS0
OV
F1
P
Bit Addressable
Yes
Yes
Yes
No
No
No
No
No
No
General-purpose flag available to the user.
Register bank select bits.
Overflow flag. Modified by ADD, ADDC, SUBB, MUL, and DIV instructions.
General-purpose flag available to the user.
Description
Carry flag. Modified by ADD, ADDC, SUBB, MUL, and DIV instructions.
Auxiliary carry flag. Modified by ADD and ADDC instructions.
RS1
0
0
1
1
Parity bit. The number of bits set in the accumulator added to the value of the parity bit is
always an even number.
RS0
0
1
0
1
Rev. B | Page 82 of 152
Description
Accumulator.
Auxiliary math.
Program status word (see Table 57).
Program control (see Table 58).
Data pointer low (see Table 59).
Data pointer high (see Table 60).
Data pointer (see Table 61).
Stack pointer (see Table 62).
Configuration (see Table 63).
Selected Bank
0
1
2
3
256 BYTES
Figure 81. Block Diagram Showing Programming Model via the SFRs
GENERAL-
REGISTER
PURPOSE
BANKS
STACK
RAM
16kB ELECTRICALLY
REPROGRAMMABLE
PROGRAM/DATA
256 BYTES XRAM
NONVOLATILE
COMPATIBLE
PC
FLASH/EE
MEMORY
CORE
8052
IR
FUNCTION
REGISTER
128-BYTE
SPECIAL
AREA
OTHER ON-CHIP
PERIPHERALS:
• SERIAL I/O
• WDT
• TIMERS
MEASUREMENT
TEMPERATURE
MANAGEMENT
LCD DRIVER
BATTERY
ENERGY
POWER
RTC
ADC
ADC