MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 32

• Manufacturer Part Number: MPC8308VMAGD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8308VMAGD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 400 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: 0 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

High-Speed Serial Interfaces (HSSI)
Figure 22
Since LVPECL driver’s DC levels (both common mode voltages and output swing) are incompatible with
MPC8308 SerDes reference clock input’s DC requirement, AC-coupling has to be used.
assumes that the LVPECL clock driver’s output impedance is 50 Ω. R1 is used to DC-bias the LVPECL
outputs prior to AC-coupling. Its value could be ranged from 140 Ω to 240 Ω depending on clock driver
vendor’s requirement. R2 is used together with the SerDes reference clock receiver’s 50-Ω termination
resistor to attenuate the LVPECL output’s differential peak level such that it meets the MPC8308’s SerDes
reference clock’s differential input amplitude requirement (between 200 mV and 800 mV differential
peak). For example, if the LVPECL output’s differential peak is 900 mV and the desired SerDes reference
clock input amplitude is selected as 600 mV, the attenuation factor is 0.67, which requires R2 = 25 Ω.
Please consult clock driver chip manufacturer to verify whether this connection scheme is compatible with
a particular clock driver chip.
32
LVPECL CLK
Driver Chip
Clock Driver
Clock Driver
Figure 22. AC-Coupled Differential Connection with LVPECL Clock Driver (Reference Only)
shows the SerDes reference clock connection reference circuits for LVPECL type clock driver.
CLK_Out
CLK_Out
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 2
R1
R1
100 Ω differential PWB trace
R2
R2
10nF
10 nF
SD_REF_CLK
SD_REF_CLK
50 Ω
50 Ω
Freescale Semiconductor
MPC8308
SerDes Refer.
CLK Receiver
Figure 22