MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 40
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MPC8308VMAGD
Manufacturer Part Number
MPC8308VMAGD
Description
MPU POWERQUICC II PRO 473MAPBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MPC8308VMAGD.pdf
(90 pages)
2.MPC8308VMAGD.pdf
(2 pages)
3.MPC8308VMAGD.pdf
(1170 pages)
4.MPC8308VMAGD.pdf
(14 pages)
Specifications of MPC8308VMAGD
Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
400MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
473-MAPBGA
Product
Network Processor
Data Rate
256 bps
Frequency
400 MHz
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Supply Current (max)
5 uA
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
0 C
Interface
I2C, JTAG, SPI
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC8308VMAGD
Manufacturer:
FREESCAL
Quantity:
300
Company:
Part Number:
MPC8308VMAGD
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC8308VMAGD
Manufacturer:
FREESCALE
Quantity:
20 000
Company:
Part Number:
MPC8308VMAGD400/266
Manufacturer:
FREESCAL
Quantity:
300
Company:
Part Number:
MPC8308VMAGDA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
PCI Express
11.4.3
Table 35
specified at the component pins.
40
Unit interval
Differential peak-to-peak
output voltage
Minimum receiver eye
width
Parameter
defines the specifications for the differential input at all receivers (RXs). The parameters are
Figure 27. Minimum Transmitter Timing and Voltage Output Compliance Specifications
Differential Receiver (RX) Input Specifications
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 2
Table 35. Differential Receiver (RX) Input Specifications
V
Symbol
RX-DIFFp-p
T
(D+ D– Crossing Point)
RX-EYE
UI
V
TX-DIFF
= 0 mV
566 mV (3 dB) >= V
Each U
300 ppm. U
account for Spread
Spectrum Clock dictated
variations.
V
V
The maximum
interconnect media and
Transmitter jitter that can
be tolerated by the
Receiver can be derived
as T
U
PEDPPRX
RX-D-
PEEWRX
RX-MAX-JITTER
0.7 UI = UI – 0.3 UI(J
|
Comments
PERX
V
V
= 0.6 UI.
[De-emphasized Bit]
TX-DIFFp-p-MIN
TX-DIFFp-p-MIN
= 2*|V
PERX
[Transition Bit]
[Transition Bit]
is 400 ps ±
TX-DIFFp-p-MIN
RX-D+
does not
= 1 -
= 800 mV
= 800 mV
TX-TOTAL-MAX
-
>= 505 mV (4 dB)
399.88
0.175
Min
0.4
(D+ D– Crossing Point)
)
V
TX-DIFF
Typical
400
= 0 mV
—
—
400.12
1.200
Max
—
Freescale Semiconductor
Units
ps
UI
V
Notes
2, 3
1
2