MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 50
![MPU POWERQUICC II PRO 473MAPBGA](/photos/6/76/67676/mpc8308_sml.jpg)
MPC8308VMAGD
Manufacturer Part Number
MPC8308VMAGD
Description
MPU POWERQUICC II PRO 473MAPBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MPC8308VMAGD.pdf
(90 pages)
2.MPC8308VMAGD.pdf
(2 pages)
3.MPC8308VMAGD.pdf
(1170 pages)
4.MPC8308VMAGD.pdf
(14 pages)
Specifications of MPC8308VMAGD
Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
400MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
473-MAPBGA
Product
Network Processor
Data Rate
256 bps
Frequency
400 MHz
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Supply Current (max)
5 uA
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
0 C
Interface
I2C, JTAG, SPI
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC8308VMAGD
Manufacturer:
FREESCAL
Quantity:
300
Company:
Part Number:
MPC8308VMAGD
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC8308VMAGD
Manufacturer:
FREESCALE
Quantity:
20 000
Company:
Part Number:
MPC8308VMAGD400/266
Manufacturer:
FREESCAL
Quantity:
300
Company:
Part Number:
MPC8308VMAGDA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Enhanced Secure Digital Host Controller (eSDHC)
Figure 34
13.2.1
Figure 35
50
provides the eSDHC clock input timing diagram.
provides the data and command output timing diagram.
operational mode
Full Speed Output Path (Write)
External Clock
MPC8308 Pins
Output from the
SD CLK at the
MPC8308 Pins
MPC8308 Pin
the Card Pin
eSDHC
Input at the
SD CLK at
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 2
Output Valid Time: t
Output Hold Time: t
Figure 34. eSDHC Clock Input Timing Diagram
VM
Figure 35. Full Speed Output Path
VM = Midpoint Voltage (NV
t
SFSCK
t
SFSCK
SFSKHOV
SFSKHOX
VM
Driving
Edge
t
DATA_DELAY
(Clock Cycle)
VM
t
t
DD
CLK_DELAY
ISU
/2)
t
(5 ns)
SFSCKL
t
SFSCKL
t
SFSCKR
Sampling
Edge
t
SFSCKH
t
IH
(5 ns)
t
SFSCKF
Freescale Semiconductor