MPC8313ECZQAFFB Freescale Semiconductor, MPC8313ECZQAFFB Datasheet - Page 40
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MPC8313ECZQAFFB
Manufacturer Part Number
MPC8313ECZQAFFB
Description
IC MPU POWERQUICC II PRO 516PBGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQAFFB.pdf
(100 pages)
Specifications of MPC8313ECZQAFFB
Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
333MHz
Voltage
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Package / Case
516-PBGA
Processor Series
MPC8xxx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
MPC8313E-RDB
Maximum Clock Frequency
333 MHz
Operating Supply Voltage
1 V, 3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
I/o Voltage
1 V, 1.8 V, 2.5 V, 3.3 V
Minimum Operating Temperature
- 40 C
For Use With
MPC8313E-RDB - BOARD PROCESSOR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC8313ECZQAFFB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
High-Speed Serial Interfaces (HSSI)
9.2.3
40
•
•
•
SD_REF_CLK
SD_REF_CLK
SD_REF_CLK
SD_REF_CLK
With on-chip termination to XCOREV
(high-speed current steering logic) compatible DC coupled.
Many other low voltage differential type outputs like LVDS (low voltage differential signaling) can
be used but may need to be AC coupled due to the limited common mode input range allowed (100
to 400 mV) for DC-coupled connection.
LVPECL outputs can produce a signal with too large of an amplitude and may need to be
DC-biased at the clock driver output first, then followed with series attenuation resistor to reduce
the amplitude, in addition to AC coupling.
Figure 24. Differential Reference Clock Input DC Requirements (External DC-Coupled)
Figure 25. Differential Reference Clock Input DC Requirements (External AC-Coupled)
or AC coupled into the unused phase (SD_REF_CLK) through the same source impedance as
the clock input (SD_REF_CLK) in use.
Interfacing With Other Differential Signaling Levels
SD_REF_CLK
SD_REF_CLK
MPC8313E PowerQUICC
Figure 26. Single-Ended Reference Clock Input DC Requirements
200 mV < Input Amplitude or Differential Peak < 800 mV
200 mV < Input Amplitude or Differential Peak < 800 mV
400 mV < SD_REF_CLK Input Amplitude < 800 mV
™
II Pro Processor Hardware Specifications, Rev. 3
SS
, the differential reference clocks inputs are HCSL
100 mV < V
V
V
min
max
0 V
Freescale Semiconductor
> V
< V
V
cm
cm
max
cm
– 400 mV
+ 400 mV
V
< 800 mV
< 400 mV
min
V
> 0 V
cm