MC68MH360AI33L Freescale Semiconductor, MC68MH360AI33L Datasheet - Page 11

• Manufacturer Part Number: MC68MH360AI33L
• Description: IC MPU QUICC 33MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360AI33L

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 33MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Table
Number
i
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
2-10
2-11
2-12
2-13
2-14
2-15
4-1
4-2
5-1
5-2
5-3
5-4
6-1
6-2
6-3
6-4
6-5
6-6
6-7
6-8
8-1
8-2
8-3
8-4
Acronyms and Abbreviated Terms .................................................................................. xiii
Global Multichannel Parameters...................................................................................... 2-5
Time Slot Assignment Table Entry Fields for Receive Section ...................................... 2-9
Time Slot Assignment Table Entry Fields for Transmit Section..................................... 2-9
Channel-Specific HDLC Parameters ............................................................................. 2-14
CHAMR Field Descriptions (HDLC)............................................................................ 2-16
TSTATE Field Descriptions for MH360 (HDLC)......................................................... 2-17
TSTATE Field Descriptions for 860MH (HDLC)......................................................... 2-18
RSTATE Field Descriptions for MH360 (HDLC) ........................................................ 2-19
RSTATE Field Descriptions for 860MH (HDLC) ........................................................ 2-20
Channel-Specific Transparent Parameters..................................................................... 2-20
CHAMR Bit Settings (Transparent Mode) .................................................................... 2-22
TSTATE Field Descriptions for MH360 (Transparent Mode) ...................................... 2-23
TSTATE Field Descriptions for 860MH (Transparent Mode) ...................................... 2-23
RSTATE Field Descriptions for MH360 (Transparent Mode)...................................... 2-28
RSTATE Field Descriptions for 860MH (Transparent Mode)...................................... 2-29
SCC Event Register Field Descriptions........................................................................... 4-4
Interrupt Table Entry Field Descriptions ......................................................................... 4-5
Receive Buffer Descriptor (RxBD) Field Descriptions ................................................... 5-1
Transmit Buffer Descriptor (TxBD) Field Descriptions.................................................. 5-5
MC68360 Functions Available ........................................................................................ 5-9
MPC860MH Functions Available ................................................................................. 5-15
Transmit Buffer Descriptor Field Descriptions ............................................................... 6-1
SICR Bit Settings............................................................................................................. 6-2
SIGMR Bit Settings ......................................................................................................... 6-4
GSMR_H Bit Settings ..................................................................................................... 6-4
GSMR_L Bit Settings ...................................................................................................... 6-5
CHAMR Bit Settings ....................................................................................................... 6-9
Pointer Registers ............................................................................................................ 6-18
State Registers................................................................................................................ 6-18
Common QMC Configurations........................................................................................ 8-1
CPM Performance Table.................................................................................................. 8-2
QMC Actions in Tx Buffer Switch.................................................................................. 8-5
Simulated Latencies ......................................................................................................... 8-6
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
TABLES
Tables
Title
Number
Page