MC68MH360AI33L Freescale Semiconductor, MC68MH360AI33L Datasheet - Page 86

• Manufacturer Part Number: MC68MH360AI33L
• Description: IC MPU QUICC 33MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360AI33L

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 33MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

IMMR + 3C00
IMMR + 3C37
IMMR + 3C38
IMMR + 3C7F
IMMR + 3C80
IMMR + 3CAF
IMMR + 3CB0
IMMR +3CBF
IMMR + 3CC0
IMMR + 3CFF
IMMR + 3C00
IMMR + 3CA3
IMMR + 3CA4
IMMR + 3CAF
IMMR + 3CBF
IMMR + 3CC0
IMMR + 3CFF
IMMR + 3CB0
#—TSATRx & TSATTx are mapped to an alternative SCC’s parameter RAM.
*—I
2
C is not available in these configurations due to memory conflict.
Transparent
Transparent Regs
= 56 Bytes
Ethernet
Ethernet Regs
Figure 5-12. MPC860MH SCC1 Parameter RAM Usage
IDMA1 Regs
= 164 Bytes
Free Area
= 72Bytes
Misc Regs
= 16 Bytes
IDMA1 Regs
= 64Bytes
Free Area
= 12Bytes
= 64Bytes
I
= 48Bytes
Misc Regs
= 16 Bytes
2
Locations used
Freescale Semiconductor, Inc.
C Regs
for SCC registers
For More Information On This Product,
*
IMMR + 3C00
IMMR + 3CAB
IMMR + 3CAC
IMMR + 3CAF
IMMR + 3CB0
IMMR + 3CBF
IMMR + 3CC0
IMMR + 3CFF
IMMR+3C00
IMMR + 3C5B
IMMR + 3C5C
IMMR + 3C7F
IMMR + 3C80
IMMR + 3CAF
IMMR + 3CB0
IMMR + 3CBF
IMMR + 3CC0
IMMR + 3CFF
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QMC Supplement
IDMA1 Regs
= 172 Bytes
HDLC Regs
= 92 Bytes
Free Area
= 36 Bytes
Misc Regs
QMC Regs
= 16 Bytes
IDMA1 Regs
= 64Bytes
Free Area
= 64Bytes
I
= 48Bytes
Misc Regs
= 16 Bytes
= 4 Bytes
HDLC
2
QMC
C Regs
Locations free
for BD
*
IMMR + 3C65
IMMR + 3C66
IMMR + 3C7F
IMMR + 3C80
IMMR + 3CAF
IMMR + 3CB0
IMMR + 3CBF
IMMR + 3CC0
IMMR + 3CFF
IMMR + 3C00
IMMR + 3C1F
IMMR + 3C20
IMMR + 3C9F
IMMR + 3CA0
IMMR + 3CAB
IMMR + 3CAC
IMMR + 3CAF
IMMR + 3CB0
IMMR + 3CBF
IMMR + 3CC0
IMMR + 3CFF
IMMR+3C00
QMC on
Multiple SCCs
IDMA1 Regs
UART Regs
= 102 Bytes
= 128 Bytes
Misc Regs
QMC Regs
QMC Regs
= 32 Bytes
= 16 Bytes
IDMA1 Regs
= 64Bytes
Free Area
=12 Bytes
Free Area
= 64Bytes
I
= 48Bytes
Misc Regs
= 16 Bytes
= 4 Bytes
UART
Free Area
= 26 Bytes
2
C Regs
Locations used
for secondary
registers
*#