MPC7410RX500LE Freescale Semiconductor, MPC7410RX500LE Datasheet - Page 49

• Manufacturer Part Number: MPC7410RX500LE
• Description: IC MPU 32BIT 500MHZ PPC 360-CBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC7410RX500LE

• Processor Type: MPC74xx PowerPC 32-Bit
• Speed: 500MHz
• Voltage: 1.8V
• Mounting Type: Surface Mount
• Package / Case: 360-FCCBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Freescale Semiconductor
Revision
5
4
3
2
4/13/2005
Date
—
—
—
Section numbering revised. In all previous versions, section numbering began with ‘1.’ These extra
‘1’s’ were deleted. For example, previously numbered section 1.8.2 changed to 8.2.
Section 7.1—added CTE value for HCTE package. Corrected minimum module height from 2.65 mm
to 2.72 mm per Figure 17.
Section 3—added HCTE_LGA (VS package descriptor) package description which is the
HCTE_CBGA (HX package descriptor) with the spheres removed.
Table 4—generalized ‘HCTE CBGA’ column to ‘HCTE’ to include both HCTE_CBGA and HCTE_LGA
package thermal characteristics.
Section 5—added HCTE_LGA package. The HCTE_LGA has the same pin assignments as the
CBGA and HCTE_CBGA packages. Added side view Part C for HCTE_LGA.
Section 6—added HCTE_LGA package (VS package descriptor). The HCTE_LGA has the same
pinout listing as the CBGA and HCTE packages.
Section 7.3—added HCTE_LGA package parameters.
Section 7.4—added HCTE_LGA package mechanical dimensions.
Table 17—added HCTE_LGA package (VS package descriptor) to part numbering nomenclature.
Table 5—Changed measurement test condition I
to 5 mA for V
Section 1.8.2—revised text regarding AV
Figure 17—revised diagram and dimensions to specify ‘cap regions’ versus individual cap
measurements. Moved individual capacitor placement to separate figure.
Figure 18—Added this figure to show each individual capacitor placement and value.
Figure 22—updated COP Connector Diagram to recommend a weak pull-up resistor on TCK.
Public release, includes Rev 1.1 changes.
Section 1.7.2—added package capacitor values.
Section 1.8.6—added recommendation that strong pull-up/down resistors be used on the
PLL_CFG[0:3] signals.
Table 8—removed mode input setup and hold times. These inputs adhere to the general input setup
and hold specifications.
Figure 5—revised mode input diagram to show sample points around HRESET negation.
Section 1.3—added HCTE package description.
Figure 22—added note 6 to emphasize that COP emulator and target board need to be able to drive
HRESET and TRST independently to the CPU.
Section 1.8.2—revised section for HCTE package. Added text and figure for AV
package.
Section 1.8.6—removed AACK, TEA, and TS from control signals requiring pull-ups. Removed TBST
from snooped transfer attribute list. TBST is an output and is not snooped.
Table 6—Changed note 1 to specify that OV
MPC7410 RISC Microprocessor Hardware Specifications, Rev. 6.1
Table 16. Document Revision History (continued)
OL
per Product Bulletin.
Substantive Change(s)
DD
filter selection for the CBGA package.
DD
and L2OV
OH
from -6mA to –5 mA for V
DD
power is typically <5% of V
Document Revision History
OH
DD
and I
filter for the CBGA
OL
DD
from 6 mA
power.
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