CS4245-CQZ Cirrus Logic Inc, CS4245-CQZ Datasheet - Page 45

• Manufacturer Part Number: CS4245-CQZ
• Description: IC CODEC AUD STER 104DB 48LQFP
• Manufacturer: Cirrus Logic Inc
• Type: Stereo Audior

Specifications of CS4245-CQZ

• Package / Case: 48-LQFP
• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 104 / 104
• Voltage - Supply, Analog: 3.13 V ~ 5.25 V
• Voltage - Supply, Digital: 3.13 V ~ 5.25 V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 12
• Number Of Dac Outputs: 4
• Conversion Rate: 192 KSPS
• Interface Type: Serial (I2C, SPI)
• Resolution: 24 bit
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 10 C
• Number Of Channels: 2 ADC/2 DAC
• Thd Plus Noise: - 95 dB ADC / - 90 dB DAC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1501 - BOARD EVAL FOR CS4245 CODEC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1034

DS656F2
6.5.2
6.6
6.6.1
6.6.2
6.6.3
Reserved
7
Signal Selection - Address 06h
Master Clock 2 Frequency (Bits 2:0)
Function:
These bits set the frequency of the supplied MCLK2 signal. See
Auxiliary Output Source Select (Bits 6:5)
Function:
These bits are used to select the analog output source. Please refer to
Digital Loopback (Bit 1)
Function:
When this bit is set, an internal digital loopback from the ADC to the DAC are enabled. Please refer to
“Internal Digital Loopback” on page
Asynchronous Mode (Bit 0)
Function:
When this bit is set, the DAC and ADC may be operated at independent asynchronous sample rates de-
rived from MCLK1 and MCLK2. When this bit is cleared, the DAC and ADC must operate at synchronous
sample rates derived from MCLK1.
AOutSel1
6
MCLK2 Divider
AOutSel1
Reserved
Reserved
÷ 1.5
÷ 1
÷ 2
÷ 3
÷ 4
AOutSel0
0
0
1
1
5
Table 13. Auxiliary Output Source Selection
AOutSel0
Table 12. MCLK 2 Frequency
MCLK2 Freq2 MCLK2 Freq1 MCLK2 Freq0
Reserved
35.
0
1
0
1
4
0
0
0
0
1
1
1
Auxiliary Output Source
Reserved
3
High Impedance
DAC Output
PGA Output
Reserved
0
0
1
1
0
0
1
Reserved
Table 12
2
Table
for the appropriate settings.
0
1
0
1
0
1
x
13.
LOOP
1
CS4245
ASynch
0
45