CS42L51-CNZ Cirrus Logic Inc, CS42L51-CNZ Datasheet - Page 25

• Manufacturer Part Number: CS42L51-CNZ
• Description: IC CODEC STEREO W/HDPN AMP 32QFN
• Manufacturer: Cirrus Logic Inc
• Type: Stereo Audior

Specifications of CS42L51-CNZ

• Package / Case: 32-QFP
• Data Interface: PCM Audio Interface
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 98 / 98
• Voltage - Supply, Analog: 1.8V, 2.5V
• Voltage - Supply, Digital: 1.8V, 2.5V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 6
• Number Of Dac Outputs: 2
• Conversion Rate: 96 KSPS
• Interface Type: Serial (2-Wire, 3-Wire, I2C, SPI)
• Resolution: 24 bit
• Operating Supply Voltage: 1.8 V / 2.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 10 C
• Number Of Channels: 2 ADC/2 DAC
• Thd Plus Noise: - 88 dB ADC / - 86 dB DAC
• Peak Reflow Compatible (260 C): No
• Leaded Process Compatible: No
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1005 - BOARD EVAL FOR CS42L51 CODEC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1045

DS679F1
POWER CONSUMPTION
See
1
2
3
4
5
6
7
8
9
Operation
Off
Standby
Mono Record
Stereo Record
Mono Playback
Stereo Playback
Mono Record & Playback
PGA in (no MIC) to Mono Out
Phone Monitor
MIC (w/bias) in to Mono Out
Stereo Record & Playback
PGA in (no MIC) to Stereo Out
(Note 25)
(Note 26)
25. Unless otherwise noted, test conditions are as follows: All zeros input, slave mode, sample rate =
26. RESET pin 25 held LO, all clocks and data lines are held LO.
27. RESET pin 25 held HI, all clocks and data lines are held HI.
28. VL current will slightly increase in master mode.
(Note 27)
48 kHz; No load. Digital (VD) and logic (VL) supply current will vary depending on speed mode and mas-
ter/slave operation.
MIC to PGA to ADC
MIC to PGA to ADC
MIC to PGA to ADC
PGA to ADC 1 1 1 0 1 0 0 1 1 1 1.8
PGA to ADC 1 1 0 0 0 0 0 1 1 1 1.8
(with Bias)
(no Bias)
(no Bias)
ADC 1 1 1 1 1 0 0 1 1 1 1.8
ADC 1 1 1 1 0 0 0 1 1 1 1.8
x x x x x x x x x x 1.8
x x x x x x 1 x x x 1.8
1 1 1 0 1 0 0 1 0 0 1.8
1 1 1 0 1 0 0 1 0 1 1.8
1 1 0 0 0 0 0 0 0 1 1.8
1 0 1 1 1 1 0 1 1 1 1.8
0 0 1 1 1 1 0 1 1 1 1.8
1 0 1 0 1 0 0 1 1 1 1.8
1 0 1 0 1 0 0 1 0 0 1.8
0 0 0 0 0 0 0 1 1 1 1.8
Power Ctl. Registers
02h
03h
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
V
i
VA_HP
1.66
2.03
2.77
3.21
1.66
2.03
1.66
2.03
2.77
3.21
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Typical Current (mA)
0.01
0.01
1.85
2.07
2.35
2.58
3.67
3.95
3.27
3.52
2.69
2.93
3.65
3.91
5.48
5.76
1.40
1.71
2.05
2.50
3.63
4.16
4.95
5.52
5.59
6.28
i
VA
0
0
0.02
0.03
2.03
3.05
2.03
3.08
2.05
3.09
2.03
3.08
2.12
3.18
2.12
3.17
3.17
2.35
3.48
2.35
3.49
2.73
4.08
2.75
4.08
2.82
4.19
2.11
i
VD
0
0
(Note 28)
0.03
0.05
0.03
0.05
0.03
0.05
0.03
0.05
0.03
0.04
0.03
0.04
0.03
0.04
0.01
0.02
0.01
0.02
0.03
0.05
0.03
0.05
0.03
0.04
i
VL
0
0
0
0
CS42L51
(mW
Power
Total
12.94
14.29
10.36
17.71
16.62
15.40
10.45
17.84
13.73
22.45
18.08
12.93
23.02
14.49
25.79
16.90
29.20
20.18
34.30
0.05
0.10
7.05
7.95
9.61
8.72
9.74
0
0
rms
25
)