CS42L51-CNZ Cirrus Logic Inc, CS42L51-CNZ Datasheet - Page 7

• Manufacturer Part Number: CS42L51-CNZ
• Description: IC CODEC STEREO W/HDPN AMP 32QFN
• Manufacturer: Cirrus Logic Inc
• Type: Stereo Audior

Specifications of CS42L51-CNZ

• Package / Case: 32-QFP
• Data Interface: PCM Audio Interface
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 98 / 98
• Voltage - Supply, Analog: 1.8V, 2.5V
• Voltage - Supply, Digital: 1.8V, 2.5V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 6
• Number Of Dac Outputs: 2
• Conversion Rate: 96 KSPS
• Interface Type: Serial (2-Wire, 3-Wire, I2C, SPI)
• Resolution: 24 bit
• Operating Supply Voltage: 1.8 V / 2.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 10 C
• Number Of Channels: 2 ADC/2 DAC
• Thd Plus Noise: - 88 dB ADC / - 86 dB DAC
• Peak Reflow Compatible (260 C): No
• Leaded Process Compatible: No
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1005 - BOARD EVAL FOR CS42L51 CODEC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1045

DS679F1
1. PIN DESCRIPTIONS - SOFTWARE (HARDWARE) MODE
LRCK
SDA/CDIN
(MCLKDIV2)
SCL/CCLK
(I²S/LJ)
AD0/CS
(DEM)
VA_HP
FLYP
GND_HP
FLYN
VSS_HP
Pin Name
#
1
2
3
4
5
6
7
8
9
SDA/CDIN (MCLKDIV2)
Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on the
serial audio data line.
Serial Control Data (Input/Output) - SDA is a data I/O in I²C Mode. CDIN is the input data line for the
control port interface in SPI Mode.
MCLK Divide by 2 (Input) - Hardware Mode: Divides the MCLK by 2 prior to all internal circuitry.
Serial Control Port Clock (Input) - Serial clock for the serial control port.
Interface Format Selection (Input) - Hardware Mode: Selects between I²S & Left-Justified interface for-
mats for the ADC & DAC.
Address Bit 0 (I²C) / Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I²C Mode; CS
is the chip-select signal for SPI format.
De-Emphasis (Input) - Hardware Mode: Enables/disables the de-emphasis filter.
Analog Power For Headphone (Input) - Positive power for the internal analog headphone section.
Charge Pump Cap Positive Node (Input) - Positive node for the external charge pump capacitor.
Analog Ground (Input) - Ground reference for the internal headphone/charge pump section.
Charge Pump Cap Negative Node (Input) - Negative node for the external charge pump capacitor.
Negative Voltage From Charge Pump (Output) - Negative voltage rail for the internal analog head-
phone section.
SCL/CCLK (I²S/LJ)
ADO/CS (DEM)
GND_HP
VA_HP
LRCK
FLYP
FLYN
1
2
3
4
5
6
7
8
32
9
10
31
CS42L51
11
30
12
29
Pin Description
13
28
14
27
15
26
25
16
24
23
22
21
20
19
18
17
MICIN2/BIAS/AIN3B
AIN1B
AFILTB
AFILTA
AIN2B/BIAS
AIN2A
MICIN1/AIN3A
AIN1A
CS42L51
7