CS42324-CQZ Cirrus Logic Inc, CS42324-CQZ Datasheet - Page 34

• Manufacturer Part Number: CS42324-CQZ
• Description: IC CODEC STEREO AUDIO 48LQFP
• Manufacturer: Cirrus Logic Inc
• Type: Audio Codecr

Specifications of CS42324-CQZ

• Package / Case: 48-LQFP
• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 1 / 2
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 95 / 100
• Voltage - Supply, Analog: 3.13 V ~ 3.47 V
• Voltage - Supply, Digital: 3.13 V ~ 3.47 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 1
• Number Of Dac Outputs: 2
• Conversion Rate: 96 KSPS
• Interface Type: Serial (I2S, SPI)
• Resolution: 24 bit
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Number Of Channels: 1 ADC/2 DAC
• Supply Current: 10 mA to 24 mA
• Thd Plus Noise: - 88 dB ADC / - 90 dB DAC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1498 - BOARD EVAL FOR CS42324 CODEC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1602

34
4.3.3
4.3.4
4.4
4.4.1
4.4.2
Digital-to-Analog Data Path
High-Pass Filter and DC Offset Calibration
When using operational amplifiers in the input circuitry driving the CS42324, a small DC offset may be
driven into the A/D converter. The CS42324 includes a high-pass filter after the decimator to remove any
DC offset which could result in recording a DC level, possibly yielding clicks when switching between de-
vices in a multichannel system.
The high-pass filter continuously subtracts a measure of the DC offset from the output of the decimation
filter. If the HPFFreeze bit is set during normal operation, the current value of the DC offset for the each
channel is frozen and this DC offset will continue to be subtracted from the conversion result. This feature
makes it possible to perform a system DC offset calibration by:
1. Running the CS42324 with the high-pass filter enabled until the filter settles. See
2. Disabling the high-pass filter and freezing the stored DC offset for continuous subtraction.
A system calibration performed in this way eliminates offsets anywhere in the signal path between the
calibration point and the CS42324.
Digital Attenuation Control
Digital attenuation control functions are implemented, offering independent channel control for the ADC
PCM signal path. The volume controls are programmable to ramp in increments of 0.5 dB at a rate con-
trolled by the ADC soft ramp.
Each ADC signal path may also be independently muted via mute control bits. When enabled, each bit
attenuates the signal to its maximum value. When the mute bit is disabled, the signal returns to the atten-
uation level set in the respective volume control register. The attenuation is ramped up and down at the
rate specified by the ADC_SOFT.
Digital Volume Control
Two stereo digital volume control functions are implemented, offering independent channel control for
DAC1 and DAC2 PCM signal paths into the digital mixer. The volume controls are programmable to ramp
in increments of 0.5 dB at a rate controlled by the DAC1/2 soft ramp/zero cross settings.
Each DAC1/2 signal path may also be independently muted via mute control bits. When enabled, each
bit attenuates the signal to its maximum value. When the mute bit is disabled, the signal returns to the
attenuation level set in the respective volume control register. The attenuation is ramped up and down at
the rate specified by the DAC1/2_SOFT and DAC1/2_ZC bits.
Mono Channel Mixer
Independent channel mixers for DAC1 and DAC2 may be used to create a mix of the left and right chan-
nels PCM signals. This mix allows the user to produce a MONO signal from a stereo source. The mixer
may also be used to implement a left/right channel swap.
Characteristics” on page 19
for filter settling time.
“ADC Digital Filter
CS42324
DS721A6