CS42324-CQZ Cirrus Logic Inc, CS42324-CQZ Datasheet - Page 44

• Manufacturer Part Number: CS42324-CQZ
• Description: IC CODEC STEREO AUDIO 48LQFP
• Manufacturer: Cirrus Logic Inc
• Type: Audio Codecr

Specifications of CS42324-CQZ

• Package / Case: 48-LQFP
• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 1 / 2
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 95 / 100
• Voltage - Supply, Analog: 3.13 V ~ 3.47 V
• Voltage - Supply, Digital: 3.13 V ~ 3.47 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 1
• Number Of Dac Outputs: 2
• Conversion Rate: 96 KSPS
• Interface Type: Serial (I2S, SPI)
• Resolution: 24 bit
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Number Of Channels: 1 ADC/2 DAC
• Supply Current: 10 mA to 24 mA
• Thd Plus Noise: - 88 dB ADC / - 90 dB DAC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1498 - BOARD EVAL FOR CS42324 CODEC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1602

44
5. REGISTER QUICK REFERENCE
This table shows the register names and their associated default values. All bits marked as “Reserved” must main-
tain their default values.
Addr
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
Device ID
page 46
Mute Control
page 46
Operational
Control
page 47
Serial Port 1
Control
page 49
Serial Port 2
Control
page 50
Reserved
ADC clocking
page 50
DAC1 clocking
page 51
DAC2 clocking
page 52
Reserved
ADC Control
page 52
DAC1 Control
page 53
DAC2 Control
page 55
AOUT1 Control
page 56
AOUT2 Control
page 57
AOUT3 Control
page 57
Function
DEVICE3
Reserved
Reserved
SP1_M/S
SP2_M/S
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
DAC1_
DAC2_
DEPH
DEPH
7
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
SYS_MCLK
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
DEVICE2
SNGVOL
SNGVOL
DAC1_
DAC2_
HPFRZ
DAC1_
DAC2_
MCLK
MCLK
MCLK
ADC_
ADC_
PDN
6
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
DAC1_SOFT
DEVICE1
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
INT_HL
DAC2_
DAC2_
MuteL
ADC_
SOFT
SOFT
5
1
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
DAC1_SP
DAC2_SP
DAC1_ZC
DEVICE0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
FREEZE
SPEED
SPEED
DAC2_
DAC2_
MuteR
ADC_
SP1_
SP2_
SP
ZC
4
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
LOOPBACK
LOOPBACK
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
MUTEC1
MUTEC2
MUTEC3
MCLK1
FREQ1
MCLK2
FREQ1
DAC1_
DAC1_
DAC2_
MuteL
REV3
3
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
x
TRI-SDOUT
DAC1_INV
DAC2_INV
AIN_SEL2
Reserved
Reserved
Reserved
Reserved
Reserved
AOUT1_
AOUT2_
AOUT3_
MCLK1
FREQ0
MCLK2
FREQ0
DAC1_
MuteR
REV2
SEL2
SEL2
SEL2
2
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
x
DAC1_MIX1 DAC1_MIX0
DAC2_MIX1 DAC2_MIX0
DAC1_DIF1 DAC1_DIF0
DAC2_DIF1 DAC2_DIF0
ADC_DIF1
AIN_SEL1
Reserved
Reserved
Reserved
Reserved
TRI-SP1
AOUT1_
AOUT2_
AOUT3_
MuteL
ADC_
REV1
SEL1
SEL1
SEL1
1
x
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
CS42324
SP1_MCLK
SP2_MCLK
ADC_DIF0
DS721A6
AIN_SEL0
Reserved
Reserved
TRI-SP2
AOUT1_
AOUT2_
AOUT3_
MuteR
REV0
ADC_
SEL0
SEL0
SEL0
0
x
0
0
0
0
0
0
0
0
0
1
0
0
0
1
1