ADAU1381BCPZ Analog Devices Inc, ADAU1381BCPZ Datasheet - Page 34

• Manufacturer Part Number: ADAU1381BCPZ
• Description: IC AUDIO CODEC STEREO LN 32LFCSP
• Manufacturer: Analog Devices Inc
• Type: Stereo Audior

Specifications of ADAU1381BCPZ

• Data Interface: Serial, SPI™
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: No
• S/n Ratio, Adcs / Dacs (db) Typ: 97 / 100
• Dynamic Range, Adcs / Dacs (db) Typ: 96.5 / 100
• Voltage - Supply, Analog: 1.8 V ~ 3.65 V
• Voltage - Supply, Digital: 1.63 V ~ 3.65 V
• Operating Temperature: -25°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-VFQFN, CSP Exposed Pad
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 3
• No. Of Output Channels: 3
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 100dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADAU1381
Stop and start conditions can be detected at any stage during
the data transfer. If these conditions are asserted out of sequence
with normal read and write operations, the ADAU1381
immediately jumps to the idle condition. During a given SCL
high period, the user should issue only one start condition, one
stop condition, or a single stop condition followed by a single
start condition. If an invalid subaddress is issued by the user,
the ADAU1381 does not issue an acknowledge and returns to
the idle condition. If the user exceeds the highest subaddress while
(CONTINUED)
(CONTINUED)
(CONTINUED)
(CONTINUED)
(CONTINUED)
(CONTINUED)
START BY
MASTER
SDA
SDA
SCL
SCL
SDA
SDA
SDA
SCL
SCL
SCL
START BY
MASTER
0
0
1
1
1
1
SUBADDRESS BYTE 2
CHIP ADDRESS BYTE
SUBADDRESS BYTE 2
CHIP ADDRESS BYTE
READ DATA BYTE 1
1
1
FRAME 1
FRAME 3
FRAME 1
FRAME 3
FRAME 5
0
0
ADDR1
ADDR1
Figure 39. I
Figure 38. I
ADDR0
ADDR0
ACKNOWLEDGE
ACKNOWLEDGE
ACKNOWLEDGE
BY ADAU1381
BY ADAU1381
ACKNOWLEDGE
ACKNOWLEDGE
BY ADAU1381
R/W
2
C Read from ADAU1381 Clocking
R/W
BY ADAU1381
BY ADAU1381
Rev. B | Page 34 of 84
2
C Write to ADAU1381 Clocking
in auto-increment mode, one of two actions is taken. In read mode,
the ADAU1381 outputs the highest subaddress register contents
until the master device issues a no acknowledge, indicating the
end of a read. A no-acknowledge condition is where the SDA
line is not pulled low on the ninth clock pulse on SCL. If the
highest subaddress location is reached while in write mode, the
data for the invalid byte is not loaded into any subaddress register,
a no acknowledge is issued by the ADAU1381, and the part returns
to the idle condition.
REPEATED
START BY MASTER
0
READ DATA BYTE 2
SUBADDRESS BYTE 1
1
FRAME 6
FRAME 2
SUBADDRESS BYTE 1
CHIP ADDRESS BYTE
1
DATA BYTE 1
FRAME 4
FRAME 2
FRAME 4
1
0
ACKNOWLEDGE
ACKNOWLEDGE
ADDR1
BY ADAU1381
BY MASTER
ACKNOWLEDGE
BY ADAU1381
ADDR0
ACKNOWLEDGE
ACKNOWLEDGE
BY ADAU1381
BY ADAU1381
R/W
STOP BY
MASTER
STOP BY
MASTER