DP83916VF National Semiconductor, DP83916VF Datasheet - Page 39
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DP83916VF
Manufacturer Part Number
DP83916VF
Description
IC CTRLR ORIENT NETWK IN 132PQFP
Manufacturer
National Semiconductor
Series
SONIC™r
Datasheet
1.DP83916VF.pdf
(96 pages)
Specifications of DP83916VF
Controller Type
Network Interface Controller (NIC)
Interface
Bus
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Current - Supply
-
Voltage - Supply
-
Operating Temperature
-
Other names
*DP83916VF
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DP83916VF
Manufacturer:
National
Quantity:
226
Part Number:
DP83916VF
Manufacturer:
NS/国半
Quantity:
20 000
15 –12
4 0 SONIC-16 Registers
4 3 7 Data Configuration Register 2
(RA
This register (Figure 4-10) is for enabling the extended bus interface options
A hardware reset will set all bits in this register to ‘‘0’’ except for the Extended Programmable Outputs which are unknown until
written to and bits 5 to 11 which must always be written with zeroes but are ‘‘don’t cares’’ when read A software reset will not
affect any bits in this register This register should only be written to when the SONIC-16 is in software reset (the RST bit in the
Command Register is set)
11 –5
Bit
4
3
2
1
0
k
EXPO3
5 0
r w
15
l
e
EXPO
These bits program the level of the Extended User outputs (EXUSR
Writing a ‘‘1’’ to any of these bits programs a high level to the corresponding output Writing a ‘‘0’’ to any of these
bits programs a low level to the corresponding output EXUSR
EXUSR
Section 4 3 2)
Must be written with zeroes
PH PROGRAM HOLD
When this bit is set to ‘‘0’’ the HOLD request output is asserted deasserted from the falling edge of bus clock If this
bit is set to ‘‘1’’ HOLD will be asserted deasserted
Must be zero
PCM PACKET COMPRESS WHEN MATCHED
When this bit is set to a ‘‘1’’ (and the PCNM bit is reset to a ‘‘0’’) the PCOMP output will be asserted if the
destination address of the packet being received matches one of the entries in the CAM (Content Addressable
Memory) This bit along with PCNM is used with the Management Bus of the DP83950 Repeater Interface
Controller (RIC) See the DP83950 datasheet for more details on the RIC Management Bus This mode is also called
the Managed Bridge Mode
Note 1 Setting PCNM and PCM to ‘‘1’’ at the same time is not allowed
Note 2 If PCNM and PCM are both ‘‘0’’ the PCOMP output will remain TRI-STATE until PCNM or PCM are changed
PCNM COMPRESS WHEN NOT MATCHED
When this bit is set to a ‘‘1’’ (and the PCM bit is set to ‘‘0’’) the PCOMP output will be asserted if the destination
address of the packet does not match one of the entries in the CAM See the PCM bit above This mode is also
called the Managed Hub Mode
Note PCOMP will not be asserted if the destination address is a broadcast address This is true regardless of the state of the BRD bit in the
RJCM REJECT ON CAM MATCH
When this bit is set to ‘‘1’’ the SONIC-16 will reject a packet on a CAM match Setting RJCM to ‘‘0’’ causes the
SONIC-16 to operate normally by accepting packets on a CAM match Setting this mode is useful for a small bridge
with a limited number of nodes attached to it RJCM only affects the CAM though Setting RJCM will not invert the
function of the BRD PRO or AMC bits (to accept broadcast all physical or multicast packets respectively) in the
Receive Control Register (see Section 4 3 3) This means for example that it is not possible to set RJCM and BRD
to reject all broadcast packets If RJCM and BRD are set at the same time however all broadcast packets will be
accepted but any packets that have a destination address that matches an address in the CAM will be rejected
3Fh)
EXPO2
Receive Control Register
r w
k
14
k
3 0
3 0
l
l
EXTENDED PROGRAMMABLE OUTPUTS
EXPO1
are only available when the Extended Bus mode is selected (bit 15 in the DCR is set to ‘‘1’’ see
r w
13
EXPO0
EXPO3 0 EXTENDED PROGRAMMABLE OUTPUTS
PH
PCM
PCNM
RJCM
(Continued)
r w
12
Field
FIGURE 4-10 Data Configuration Register 2
11
0
PROGRAM HOLD
PACKET COMPRESS WHEN MATCHED
PACKET COMPRESS WHEN NOT MATCHED
REJECT ON CAM MATCH
10
0
9
0
39
Description
clock later on the rising edge of bus clock
8
0
Meaning
7
0
k
3 0
6
0
l
k
5
0
3 0
are similiar to USR
l
r w
PH
) when the SONIC-16 is a bus master
4
3
0
PCM
r w
2
k
1 0
l
PCNM
r w
except that
1
RJCM
r w
0