DP83916VF National Semiconductor, DP83916VF Datasheet - Page 70

• Manufacturer Part Number: DP83916VF
• Description: IC CTRLR ORIENT NETWK IN 132PQFP
• Manufacturer: National Semiconductor
• Series: SONIC™r

Specifications of DP83916VF

• Controller Type: Network Interface Controller (NIC)
• Interface: Bus
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Supply: -
• Voltage - Supply: -
• Operating Temperature: -
• Other names: *DP83916VF

quired between the receive input pair and the AUI interface
6 0 Network Interfacing
External ENDEC When EXT
passed and the signals are provided directly to the user
Since SONIC-16’s on-chip ENDEC is the same as Nation-
al’s DP83910 Serial Network Interface (SNI) the interface
considerations discussed in this section would also apply to
using this device in the external ENDEC mode
6 1 MANCHESTER ENCODER AND
DIFFERENTIAL DRIVER
The ENDEC unit’s encoder begins operation when the MAC
section begins sending the serial data stream It converts
NRZ data from the MAC section to Manchester data for the
differential drivers (TX
first half of the bit cell contains the complementary data and
the second half contains the true data (Figure 6-3) A tran-
sition always occurs at the middle of the bit cell As long as
the MAC continues sending data the ENDEC section re-
mains in operation At the end of transmission the last tran-
sition is always positive occurring at the center of the bit
cell if the last bit is a one or at the end of the bit cell if the
last bit is a zero
The differential transmit pair drives up to 50 meters of twist-
ed pair AUI cable These outputs are source followers which
require two 270
a pulse transformer is required between the transmit pair
output and the AUI interface
The driver allows both half-step and full-step modes for
compatibility with Ethernet I and IEEE 802 3 When the SEL
pin is tied to ground (for Ethernet I) TX
respect to TX
tion transformer ( Figure 6-2 ) When SEL is tied to V
IEEE 802 3) TX
6 1 1 Manchester Decoder
The decoder consists of a differential receiver and a phase
lock loop (PLL) to separate the Manchester encoded data
stream into clock signals and NRZ data The differential in-
put must be externally terminated with two 39
connected in series In addition a pulse transformer is re-
To prevent noise from falsely triggering the decoder a
squelch circuit at the input rejects signals with a magnitude
FIGURE 6 3 Manchester Encoded Data Stream
b
a
during idle on the primary side of the isola-
pull-down resistors to ground In addition
and TX
a b
b
) In Manchester encoding the
e
are equal in the idle state
1 the internal ENDEC is by-
(Continued)
a
is positive with
TL F 11722–54
resistors
CC
(for
70
6-4 and suggested oscillator specifications are shown in Ta-
less than
are decoded
Once the input exceeds the squelch requirements the de-
coder begins operation The decoder may tolerate bit jitter
up to 18 ns in the received data The decoder detects the
end of a frame within one and a half bit times after the last
bit of data
6 1 2 Collision Translator
When the Ethernet transceiver (DP8392 CTI) detects a colli-
sion it generates a 10 MHz signal to the differential collision
inputs (CD
detects these inputs active its Collision translator converts
the 10 MHz signal to an active collision signal to the MAC
section This signal causes SONIC-16 to abort its current
transmission and reschedule another transmission attempt
The collision differential inputs are terminated the same way
as the differential receive inputs and a pulse transformer is
required between the collision input pair and the AUI inter-
face The squelch circuitry is also similar rejecting pulses
with magnitudes less than
6 1 3 Oscillator Inputs
The oscillator inputs to the SONIC-16 (X1 and X2) can be
driven with a parallel resonant crystal or an external clock
In either case the oscillator inputs must be driven with a
20 MHZ signal The signal is divided by 2 to generate the
10 MHz transmit clock (TXC) for the MAC unit The oscilla-
tor also provides internal clock signals for the encoding and
decoding circuits
6 1 3 1 External Crystal
According to the IEEE 802 3 standard the transmit clock
(TXC) must be accurate to 0 01% This means that the os-
cillator circuit which includes the crystal and other parts
involved must be accurate to 0 01% after the clock has
been divided in half Hence when using a crystal it is nec-
essary to consider all aspects of the crystal circuit An ex-
ample of a recommended crystal circuit is shown in Figure
ble 6-1 The load capacitors in Figure 6-4 C1 and C2
should be no greater than 36 pF each including all stray
capacitance (see note 2 below) The resistor R1 may be
required in order to minimize frequency drift due to changes
in V
since R1 decreases the loop gain If R1 is made too large
the loop gain will be greatly reduced and the crystal will not
oscillate If R1 is made too small normal variations in V
may cause the oscillation frequency to drift out of specifica-
tion As a first rule of thumb the value of R1 should be
made equal to five times the motional resistance of the crys-
tal The motional resistance of 20 MHz crystals is usually in
the range of 10
ues for R1 should be in the range of 50
decision of whether or not to include R1 should be based
upon measured variations of crystal frequency as each of
the circuit parameters are varied
CC
If R1 is required its value must be carefully selected
b
a
175 mV Signals more negative than
and CD
to 30
b
) of the SONIC-16 When SONIC-16
This implies that reasonable val-
b
175 mV
to 150
b
300 mV
The
CC