DS26521LN+ Maxim Integrated Products, DS26521LN+ Datasheet - Page 102
DS26521LN+
Manufacturer Part Number
DS26521LN+
Description
IC TXRX T1/E1/J1 64-LQFP
Manufacturer
Maxim Integrated Products
Type
Line Interface Units (LIUs)r
Datasheet
1.DS26521LN.pdf
(258 pages)
Specifications of DS26521LN+
Number Of Drivers/receivers
1/1
Protocol
T1/E1/J1
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Register Name
Register Description:
Register Address:
Bit #
Name
Default
Bit 5: Receive Loss of Frame/Loss of Transmit Clock Indication Select (RLOFLTS).
Bit 4: Global IBO Enable (GIBOE).
Bit 1: Global Counter Latch Enable (GCLE). A low-to-high transition on this bit will, when enabled, latch the
framer performance monitor counters. Each framer can be independently enabled to accept this input. This bit must
be cleared and set again to perform another counter latch.
Bit 0: Global Interrupt Pin Inhibit (GIPI).
0 = RLOF/LTC pin indicates framer receive loss of frame
1 = RLOF/LTC pin indicates framer loss of transmit clock
0 = normal mode—IBO disabled
1 = IBO enabled
Note: To enable IBO, this bit must be set, RIBOC.IBOEN must be set, and TIBOC.IBOEN must be set.
Enabling IBO forces output pins (RSER and RSIG) to tri-state at the appropriate times.
0 = Normal operation. Interrupt pin (INTB) will toggle low on an unmasked interrupt condition.
1 = Interrupt inhibit. Interrupt pin (INTB) is forced high (inactive) when this bit is set.
—
7
0
GTCR1
Global Transceiver Control Register 1
0F0h
—
6
0
RLOFLTS
5
0
102 of 258
GIBOE
4
0
—
3
0
DS26521 Single T1/E1/J1 Transceiver
—
2
0
GCLE
1
0
GIPI
0
0
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