DS26521LN+ Maxim Integrated Products, DS26521LN+ Datasheet - Page 134

• Manufacturer Part Number: DS26521LN+
• Description: IC TXRX T1/E1/J1 64-LQFP
• Manufacturer: Maxim Integrated Products
• Type: Line Interface Units (LIUs)r

Specifications of DS26521LN+

• Number Of Drivers/receivers: 1/1
• Protocol: T1/E1/J1
• Voltage - Supply: 3.135 V ~ 3.465 V
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: RCLK Invert (RCLKINV).
Bit 6: RSYNC Invert (RSYNCINV).
Bit 5: H.100 SYNC Mode (H100EN). See Section
Bit 4: RSYSCLK Mode Select (RSCLKM).
Bit 3: RSYNC Multiframe Skip Control (RSMS) (T1 Mode Only). Useful in framing format conversions from D4 to
ESF. This function is not available when the receive-side elastic store is enabled. RSYNC must be set to output
multiframe pulses.
Bit 2: RSYNC I/O Select (RSIO). (Note: This bit must be set to zero when elastic store is disabled) The default
value for this bit is a logic 1 so that the default state of RSYNC is as an input.
Bit 1: RSYNC Mode Select 2 (RSMS2).
In E1 mode, RSMS2 also selects which multiframe signal is available at the RMSYNC pin, regardless of the
configuration for RSYNC. When RSMS2 = 0, RMSYNC outputs CAS multiframe boundaries; when RSMS2 = 1,
RMSYNC outputs CRC-4 multiframe boundaries.
Bit 0: RSYNC Mode Select 1 (RSMS1). Selects frame or multiframe pulse when RSYNC pin is in output mode. In
input mode (elastic store must be enabled) multiframe mode is only useful when receive-signaling reinsertion is
enabled.
0 = no inversion
1 = invert RCLK as input
0 = no inversion
1 = invert RSYNC as either input or output
0 = normal operation
1 = RSYNC and TSSYNCIO signals are shifted
0 = if RSYSCLK is 1.544MHz
1 = if RSYSCLK is 2.048MHz or IBO enabled
0 = RSYNC will output a pulse at every multiframe
1 = RSYNC will output a pulse at every other multiframe
0 = RSYNC is an output
1 = RSYNC is an input (only valid if elastic store enabled)
T1 Mode: RSYNC pin must be programmed in the output frame mode.
E1 Mode: RSYNC pin must be programmed in the output multiframe mode.
0 = frame mode
1 = multiframe mode
RCLKINV
RCLKINV
7
0
0 = do not pulse double-wide in signaling frames
1 = do pulse double-wide in signaling frames
0 = RSYNC outputs CAS multiframe boundaries
1 = RSYNC outputs CRC-4 multiframe boundaries
RSYNCINV
RSYNCINV
RIOCR
Receive I/O Configuration Register
084h
6
0
H100EN
H100EN
5
0
8.8.3
RSCLKM
RSCLKM
134 of 258
4
0
for more information.
RSMS
—
3
0
DS26521 Single T1/E1/J1 Transceiver
RSIO
RSIO
2
1
RSMS2
RSMS2
1
0
RSMS1
RSMS1
0
0