DS26521LN+ Maxim Integrated Products, DS26521LN+ Datasheet - Page 65

IC TXRX T1/E1/J1 64-LQFP

DS26521LN+

Manufacturer Part Number
DS26521LN+
Description
IC TXRX T1/E1/J1 64-LQFP
Manufacturer
Maxim Integrated Products
Type
Line Interface Units (LIUs)r
Datasheet

Specifications of DS26521LN+

Number Of Drivers/receivers
1/1
Protocol
T1/E1/J1
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
8.10.2 Transmit HDLC Controller
8.10.2.1
The Transmit HDLC FIFO Buffer Available register (TFBA) indicates the number of bytes that can be written into
the transmit FIFO. The count from this register informs the host as to how many bytes can be written into the
transmit FIFO without overflowing the buffer. This is a real-time register. The count shall remain valid and stable
during the read cycle.
8.10.2.2
The HDLC status registers in the DS26521 allow for flexible software interface to meet the user’s preferences.
When transmitting HDLC messages, the host can choose to be interrupt driven, or to poll to desired status
registers, or a combination of polling and interrupt processes can be used. An example routine for using the
DS26521 HDLC receiver is given in
FIFO Information
HDLC Transmit Example
Figure
8-16.
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DS26521 Single T1/E1/J1 Transceiver

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