DSPIC30F6014A-30I/PT Microchip Technology Inc., DSPIC30F6014A-30I/PT Datasheet - Page 223

• Manufacturer Part Number: DSPIC30F6014A-30I/PT
• Description: DSP, 16-Bit, 144 KB Flash, 8KB RAM, 68 I/O, TQFP-80
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC30F6014A-30I/PT

• A/d Inputs: 16-Channels, 12-Bit
• Cpu Speed: 30 MIPS
• Eeprom Memory: 4K Bytes
• Input Output: 68
• Interface: CAN, I2C, SPI, UART/USART
• Ios: 68
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 80-pin TQFP
• Programmable Memory: 144K Bytes
• Ram Size: 8K Bytes
• Timers: 5-16-bit, 2-32-bit
• Voltage, Range: 2.5-5.5
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

APPENDIX A:
Revision A (January 2005)
Original data sheet for dsPIC30F6011A, 6012A, 6013A
and 6014A devices.
Revision B (September 2005)
Revision B of this data sheet reflects these changes:
• 12-Bit ADC allows up to 200 ksps sampling rate
• FRC Oscillator revised to allow tuning in ±0.75%
• Revised electrical characteristics:
Revision C (October 2006)
Revision C of this data sheet reflects these changes:
• BSRAM and SSRAM SFRs added for Data RAM
• Added INTTREG register (see Section 5.0
• Revised I
• Base Instruction CP1 removed from instruction
• Revised electrical characteristics:
© 2006 Microchip Technology Inc.
(see Section 19.6 “Selecting the ADC Conver-
sion Clock” and Section 19.7 “ADC Speeds”),
increments (see Section 20.2.5 “Fast RC Oscil-
lator (FRC)” and Table 20-4).
- Operating Current (I
- Idle Current (I
- Power-Down Current (I
- Brown-Out Reset (BOR) (see Table 23-11)
- External Clock Timing Requirements (see
- PLL Clock Timing Specifictation (V
- PLL Jitter (seeTable 23-16 )
- Internal FRC Jitter Accuracy and Drift (see
- 12-Bit ADC Module Specifications (see
- 12-Bit ADC Conversion Timing Requirements
protection (see Section 3.2.7 “Data Ram Protec-
tion Feature”)
“Interrupts”)
set (see Table 21-2)
- Operating Current (I
- Idle Current (I
- Power-Down Current (I
- I/O Pin Input Specifications (see Table 23-8)
- Brown-Out Reset (BOR) (see Table 23-11)
- Watchdog Timer (see Table 23-21)
Table 23-14)
5.5 V) (see Table 23-15)
Table 23-18)
Table 23-38)
(see Table 23-39)
2
C Slave Addresses (see Table 15-1)
IDLE
IDLE
) (see Table 23-6)
) (see Table 23-6)
REVISION HISTORY
dsPIC30F6011A/6012A/6013A/6014A
DD
DD
) (see Table 23-5)
) (see Table 23-5)
PD
PD
) (seeTable 23-7)
) (seeTable 23-7)
DD
= 2.5-
Preliminary
DS70143C-page 221