DSPIC30F6014A-30I/PT Microchip Technology Inc., DSPIC30F6014A-30I/PT Datasheet - Page 81

• Manufacturer Part Number: DSPIC30F6014A-30I/PT
• Description: DSP, 16-Bit, 144 KB Flash, 8KB RAM, 68 I/O, TQFP-80
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC30F6014A-30I/PT

• A/d Inputs: 16-Channels, 12-Bit
• Cpu Speed: 30 MIPS
• Eeprom Memory: 4K Bytes
• Input Output: 68
• Interface: CAN, I2C, SPI, UART/USART
• Ios: 68
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 80-pin TQFP
• Programmable Memory: 144K Bytes
• Ram Size: 8K Bytes
• Timers: 5-16-bit, 2-32-bit
• Voltage, Range: 2.5-5.5
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

11.0
This section describes the second 32-bit General Pur-
pose Timer module (Timer4/5) and associated Opera-
tional modes. Figure 11-1 depicts the simplified block
diagram of the 32-bit Timer4/5 module. Figure 11-2 and
Figure 11-3 show Timer4/5 configured as two
independent 16-bit timers, Timer4 and Timer5,
respectively.
The Timer4/5 module is similar in operation to the
Timer2/3 module. However, there are some differences
which are as follows:
FIGURE 11-1:
© 2006 Microchip Technology Inc.
Note: This data sheet summarizes features of this group
of dsPIC30F devices and is not intended to be a complete
reference source. For more information on the CPU,
peripherals, register descriptions and general device
functionality, refer to the “dsPIC30F Family Reference
Manual” (DS70046).
Note:
TIMER4/5 MODULE
T5IF
Event Flag
T4CK
Timer configuration bit T32 (T4CON<3>) must be set to ‘
bits are respective to the T4CON register.
(T4CON<6>)
Data Bus<15:0>
Write TMR4
Read TMR4
TGATE
32-BIT TIMER4/5 BLOCK DIAGRAM
dsPIC30F6011A/6012A/6013A/6014A
0
1
Reset
Equal
16
TMR5HLD
TMR5
MSB
PR5
Comparator x 32
16
Q
Q
16
TMR4
LSB
PR4
Preliminary
CK
D
Gate
Sync
T
CY
TGATE (T4CON<6>)
• The Timer4/5 module does not support the ADC
• Timer4/5 can not be utilized by other peripheral
The Operating modes of the Timer4/5 module are
determined by setting the appropriate bit(s) in the
16-bit T4CON and T5CON SFRs.
For 32-bit timer/counter operation, Timer4 is the lsw
and Timer5 is the msw of the 32-bit timer.
event trigger feature
modules, such as input capture and
output compare
Note:
1
’ for a 32-bit timer/counter operation. All control
1 x
0 1
0 0
For 32-bit timer operation, T5CON control
bits are ignored. Only T4CON control bits
are used for setup and control. Timer4
clock and gate inputs are utilized for the
32-bit timer module but an interrupt is gen-
erated with the Timer5 interrupt flag (T5IF)
and the interrupt is enabled with the
Timer5 interrupt enable bit (T5IE).
Sync
TON
TCKPS<1:0>
1, 8, 64, 256
Prescaler
2
DS70143C-page 79