PIC12F509-I/P Microchip Technology Inc., PIC12F509-I/P Datasheet

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PIC12F509-I/P

Manufacturer Part Number
PIC12F509-I/P
Description
8 PIN, 1.5 KB FLASH, 41 RAM, 6 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC12F509-I/P

Cpu Speed
1 MIPS
Eeprom Memory
0 Bytes
Frequency
4 MHz
Input Output
6
Memory Type
Flash
Number Of Bits
8
Package Type
8-pin PDIP
Programmable Memory
1.5K Bytes
Ram Size
41 Bytes
Speed
4 MHz
Timers
1-8-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12F509-I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC12F508/509/16F505
Data Sheet
8/14-Pin, 8-Bit Flash Microcontrollers
*8-bit, 8-pin Devices Protected by Microchip’s Low Pin Count Patent: U.S. Patent No. 5,847,450. Additional U.S. and
foreign patents and applications may be issued or pending.
Preliminary
© 2005 Microchip Technology Inc.
DS41236B

Related parts for PIC12F509-I/P

PIC12F509-I/P Summary of contents

Page 1

... Flash Microcontrollers *8-bit, 8-pin Devices Protected by Microchip’s Low Pin Count Patent: U.S. Patent No. 5,847,450. Additional U.S. and foreign patents and applications may be issued or pending. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Preliminary Data Sheet DS41236B ...

Page 2

... Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. Preliminary , microID, MPLAB, PIC, PICmicro, PICSTART, ® 8-bit MCUs ® code hopping EE OQ © 2005 Microchip Technology Inc. ...

Page 3

... Flash Microcontroller Devices Included In This Data Sheet: • PIC12F508 • PIC12F509 • PIC16F505 High-Performance RISC CPU: • Only 33 single-word instructions to learn • All single-cycle instructions except for program branches, which are two-cycle • 12-bit wide instructions • 2-level deep hardware stack • ...

Page 4

... PDIP, SOIC, TSSOP RB5/OSC1/CLKIN 2 3 RB4/OSC2/CLKOUT 12 RB3/MCLR RC5/T0CKI 6 9 RC4 RC3 8 7 Program Memory Device Flash (words) PIC12F508 PIC12F509 PIC16F505 DS41236B-page 2 PDIP, SOIC, MSOP RB0/ICSPDAT GP5/OSC1/CLKIN RB1/ICSPCLK GP4/OSC2 RB2 GP3/MCLR/V PP RC0 RC1 RC2 Data Memory SRAM (bytes) 512 25 1024 41 1024 72 Preliminary 8 ...

Page 5

... When contacting a sales office or the literature center, please specify which device, revision of silicon and data sheet (include lit- erature number) you are using. Customer Notification System Register on our web site at www.microchip.com/cn to receive the most current information on all of our products. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Preliminary DS41236B-page 3 ...

Page 6

... PIC12F508/509/16F505 NOTES: DS41236B-page 4 Preliminary © 2005 Microchip Technology Inc. ...

Page 7

... PLDs in larger systems and coprocessor applications). while ® PC and PIC12F508 4 512 25 TMR0 Yes 5 1 Yes Yes 33 8-pin PDIP, SOIC, 8-pin PDIP, SOIC, MSOP Preliminary PIC12F509 PIC16F505 4 20 1024 1024 41 72 TMR0 TMR0 Yes Yes Yes Yes Yes Yes ...

Page 8

... PIC12F508/509/16F505 NOTES: DS41236B-page 6 Preliminary © 2005 Microchip Technology Inc. ...

Page 9

... Certain code and prototype verification procedures do apply before production shipments are available. Please contact your local Microchip Technology sales office for more details. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 2.2 Serialized Quick Turn Programming Microchip offers a unique programming service, where a few user-defined locations in each device are programmed with different serial numbers ...

Page 10

... PIC12F508/509/16F505 NOTES: DS41236B-page 8 Preliminary © 2005 Microchip Technology Inc. ...

Page 11

... PIC12F508/509/16F505 MEMORY Memory Device Program PIC12F508 512 x 12 PIC12F509 1024 x 12 PIC16F505 1024 x 12 The PIC12F508/509/16F505 devices can directly or indirectly address its register files and data memory. All Special Function Registers (SFR), including the PC, are mapped in the data memory. The PIC12F508/509/ ...

Page 12

... Stack 1 Stack 2 File Registers RAM Addr 9 Addr MUX Indirect 5 Direct Addr 5-7 Addr FSR Reg Status Reg 3 MUX Device Reset Timer ALU Power-on Reset 8 Watchdog W Reg Timer Timer0 Preliminary GPIO GP0/ISCPDAT GP1/ISCPCLK GP2/T0CKI GP3/MCLR/V PP GP4/OSC2 GP5/OSC1/CLKIN © 2005 Microchip Technology Inc. ...

Page 13

... Legend Input Output, I/O = Input/Output Power, — = Not used, TTL = TTL input Schmitt Trigger input © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Output Type TTL CMOS Bidirectional I/O pin. Can be software programmed for internal weak pull-up and wake-up from Sleep on pin change. ...

Page 14

... RAM Addr 9 Addr MUX Indirect 5 5-7 Addr FSR Reg Status Reg 3 MUX Timer Power-on ALU Reset 8 Watchdog W Reg Timer Internal RC OSC Timer0 Preliminary PORTB RB0/ICSPCLK RB1/ICSPDAT RB2 RB3/MCLR/V PP RB4/OSC2/CLKOUT RB5/OSC1/CLKIN PORTC RC0 RC1 RC2 RC3 RC4 RC5/T0CKI © 2005 Microchip Technology Inc. ...

Page 15

... Legend Input Output, I/O = Input/Output Power, — = Not used, TTL = TTL input Schmitt Trigger input © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Output Type TTL CMOS Bidirectional I/O pin. Can be software programmed for internal weak pull-up and wake-up from Sleep on pin change. ...

Page 16

... Q2, Q3 and Q4 cycles. Data memory is read during Q2 (operand read) and written during Q4 (destination write Fetch INST ( Execute INST (PC) Execute 1 Fetch 2 Execute 2 Fetch 3 Execute 3 Fetch 4 Preliminary Internal phase clock Fetch INST ( Execute INST ( Flush Fetch SUB_1 Execute SUB_1 © 2005 Microchip Technology Inc. ...

Page 17

... For devices with more than 512 bytes of program memory, a paging scheme is used. Program memory pages are accessed using one Status register bit. For the PIC12F509 and PIC16F505, with data memory register files of more than 32 registers, a banking scheme is used. Data memory banks are accessed using the File Select Register (FSR) ...

Page 18

... GENERAL PURPOSE REGISTER 0000h FILE The General Purpose Register file is accessed, either directly or indirectly, through the File Select Register (FSR). See Section 4.9 “Indirect Data Addressing: INDF and FSR Registers”. 01FFh 0200h 03FFh 0400h 7FFh Preliminary © 2005 Microchip Technology Inc. ...

Page 19

... Bank 0. 2Fh 4Fh 6Fh 30h 50h 70h General General Purpose Purpose Registers Registers 3Fh 5Fh 7Fh Bank 1 Bank 2 Preliminary PIC12F509 REGISTER FILE MAP 00 01 (1) 20h INDF TMR0 PCL Addresses map STATUS back to FSR addresses in Bank 0. OSCCAL GPIO 2Fh 30h General ...

Page 20

... Other (non Power-up) Resets include external Reset through MCLR, Watchdog Timer and wake-up on pin change Reset Reset was due to wake-up on pin change, then bit All other Resets will cause bit PIC12F509 only. 5: This bit is used on the PIC12F509. For code compatibility do not use this bit on the PIC12F508. DS41236B-page 18 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 ...

Page 21

... Note 1: If Reset was due to wake-up on pin change, then bit All other Resets will cause bit Other (non Power-up) Resets include external reset through MCLR, Watchdog Timer and wake-up on pin change Reset. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Bit 5 Bit 4 Bit 3 ...

Page 22

... A borrow from the 4th low-order bit of the result occurred bit 0 C: Carry/borrow bit (for ADDWF, SUBWF and RRF, RLF instructions) ADDWF carry occurred carry did not occur Note 1: This bit is used on the PIC12F509. For code compatibility do not use this bit on the PIC12F508. Legend Readable bit -n = Value at POR DS41236B-page 20 For example, CLRF STATUS, will clear the upper three bits and set the Z bit ...

Page 23

... A borrow from the 4th low-order bit of the result occurred bit 0 C: Carry/borrow bit (for ADDWF, SUBWF and RRF, RLF instructions) ADDWF carry occurred carry did not occur borrow occurred Legend Readable bit -n = Value at POR © 2005 Microchip Technology Inc. PIC12F508/509/16F505 R/W-0 R-1 R-1 — PA0 TO PD ...

Page 24

... W-1 W-1 W-1 W-1 T0CS T0SE PSA OSC 128 256 1 : 128 W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared Preliminary W-1 W-1 W-1 PS2 PS1 PS0 bit Bit is unknown © 2005 Microchip Technology Inc. ...

Page 25

... Prescaler assigned to Timer0 bit 2-0 PS<2:0>: Prescaler Rate Select bits Bit Value Timer0 Rate WDT Rate 000 001 010 011 100 101 110 111 Legend Readable bit -n = Value at POR © 2005 Microchip Technology Inc. PIC12F508/509/16F505 W-1 W-1 W-1 W-1 T0CS T0SE PSA OSC ...

Page 26

... R = Readable bit -n = Value at POR DS41236B-page 24 R/W-1 R/W-1 R/W-1 R/W-1 CAL4 CAL3 CAL2 CAL1 W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared Preliminary R/W-1 R/W-0 CAL0 — bit Bit is unknown © 2005 Microchip Technology Inc. ...

Page 27

... PCL Instruction Word Reset to ‘0’ PA0 7 0 Status © 2005 Microchip Technology Inc. PIC12F508/509/16F505 4.7.1 EFFECTS OF RESET The PC is set upon a Reset, which means that the PC addresses the last location in the last page (i.e., the oscillator calibration instruction). After executing MOVLW XX, the PC will roll over to location 00h and begin executing user code ...

Page 28

... PIC12F508 – Does not use banking. FSR <7:5> are unimplemented and read as ‘1’s. PIC12F509 – Uses FSR<5>. Selects between bank 0 and bank 1. FSR<7:6> is unimplemented, read as ‘1’. PIC16F505 – Uses FSR<6:5>. Selects from bank 0 to bank 3. FSR<7> is unimplemented, read as ‘1’. ...

Page 29

... Direct Addressing (FSR (opcode) Bank Select Location Select 00h Data 0Fh (1) Memory 10h Note 1: For register map detail, see Section 4.3 “Data Memory Organization”. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Addresses map back to addresses in Bank 0. 1Fh 3Fh 5Fh 7Fh Bank 0 ...

Page 30

... PIC12F508/509/16F505 NOTES: DS41236B-page 28 Preliminary © 2005 Microchip Technology Inc. ...

Page 31

... The TRIS registers are “write-only” and are set (output drivers disabled) upon Reset. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 5.4 I/O Interfacing The equivalent circuit for an I/O port pin is shown in Figure 5-2 ...

Page 32

... PS0 1111 1111 1111 1111 PS0 1111 1111 1111 1111 (3) C 0-01 1xxx q00q quuu (3) C 0-01 1xxx q00q quuu GP0 --xx xxxx --uu uuuu RB0 --xx xxxx --uu uuuu RC0 --xx xxxx --uu uuuu © 2005 Microchip Technology Inc. ...

Page 33

... Instruction Fetched MOVWF PORTB MOVF PORTB, W RB<5:0> Port pin written here Instruction Executed MOVWF PORTB (Write to PORTB) © 2005 Microchip Technology Inc. PIC12F508/509/16F505 EXAMPLE 5-1: ;Initial PORTB Settings ;PORTB<5:3> Inputs ;PORTB<2:0> Outputs ; ; ; BCF PORTB, 5 ;--01 -ppp BCF PORTB, 4 ;--10 -ppp MOVLW 007h ...

Page 34

... PIC12F508/509/16F505 NOTES: DS41236B-page 32 Preliminary © 2005 Microchip Technology Inc. ...

Page 35

... Fetch Timer0 Instruction Executed © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Counter mode is selected by setting the T0CS bit (OPTION<5>). In this mode, Timer0 will increment either on every rising or falling edge of pin T0CKI. The T0SE bit (OPTION<4>) determines the source edge. Clearing the T0SE bit selects the rising edge. Restric- tions on the external clock input are discussed in detail in Section 6.1 “ ...

Page 36

... Read TMR0 Read TMR0 reads NT0 + 1 reads NT0 reads NT0 + 2 Value on Value on Bit 0 Power-On All Other Reset Resets xxxx xxxx uuuu uuuu PS0 1111 1111 1111 1111 PS0 1111 1111 1111 1111 --11 1111 --11 1111 RC0 --11 1111 --11 1111 © 2005 Microchip Technology Inc. ...

Page 37

... Timer0 input = ± External clock if no prescaler selected; prescaler output otherwise. 3: The arrows indicate the points in time where sampling occurs. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 When a prescaler is used, the external clock input is divided by the asynchronous ripple counter-type prescaler, so that the prescaler output is symmetrical ...

Page 38

... WDT is disabled. A CLRWDT instruction should be executed before switching the prescaler. EXAMPLE 6-2: CHANGING PRESCALER (WDT CLRWDT ;Clear WDT and ;prescaler MOVLW ‘xxxx0xxx’ ;Select TMR0, new ;prescale value and ;clock source OPTION Preliminary © 2005 Microchip Technology Inc. WDT) TIMER0) ...

Page 39

... T0SE Watchdog Timer PSA WDT Enable bit Note 1: T0CS, T0SE, PSA, PS<2:0> are bits in the OPTION register. 2: T0CKI is shared with pin RC5 on the PIC16F505 and pin GP2 on the PIC12F508/509. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Sync Cycles T0CS ...

Page 40

... PIC12F508/509/16F505 NOTES: DS41236B-page 38 Preliminary © 2005 Microchip Technology Inc. ...

Page 41

... Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = bit is set © 2005 Microchip Technology Inc. PIC12F508/509/16F505 The PIC12F508/509/16F505 devices have a Watchdog Timer, which can be shut off only through configuration bit WDTE. It runs off of its own RC oscillator for added reliability. If using HS (PIC16F505 selectable ...

Page 42

... Configuration Word. The Configuration Word is not user addressable during device operation. Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = bit is set DS41236B-page 40 (1) — — MCLRE CP WDTE Unimplemented bit, read as ‘0’ ‘0’ = bit is cleared Preliminary FOSC2 FOSC1 FOSC0 bit bit is unknown © 2005 Microchip Technology Inc. ...

Page 43

... The user should verify that the device oscillator starts and expected. Adjusting the loading capacitor values and/or the Oscillator mode may be required. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 FIGURE 7-1: (1) C1 (1) C2 Note 1: See Capacitor Selection tables for recommended values of C1 and C2 ...

Page 44

... PIC16F505 PIC12F508 PIC12F509 10k XTAL 20 pF resistors provide the negative EXTERNAL SERIES RESONANT CRYSTAL OSCILLATOR CIRCUIT To Other Devices 330 74AS04 74AS04 CLKIN 0.1 mF PIC16F505 PIC12F508 XTAL PIC12F509 ) values, and the operat- EXT between 5.0 k and EXT © 2005 Microchip Technology Inc. ...

Page 45

... See Register 4-5 for more information. Internal clock Note: The 0 bit of OSCCAL is unimplemented and should be written as ‘0’ when modify- ing OSCCAL for compatibility with future PIC16F505 devices. PIC12F508 PIC12F509 for Preliminary DS41236B-page 43 ...

Page 46

... Bits <7:2> register contain oscillator calibration values due to MOVLW XX instruction at top of mem- ory. 2: See Table 7-8 for Reset value for specific conditions Reset was due to wake-up on pin change, then bit All other Resets will cause bit PIC12F509 only. 5: PIC12F508 only. DS41236B-page 44 7.3.1 EXTERNAL CLOCK IN For applications where a clock is already available ...

Page 47

... MCLR Reset during Sleep WDT Reset during Sleep WDT Reset normal operation Wake-up from Sleep on pin change Legend unchanged unknown, – = unimplemented bit, read as ‘0’. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 MCLR Reset, WDT Time-out, Power-on Reset Wake-up On Pin Change ...

Page 48

... AN522 “Power-Up Considerations” (DS00522) and AN607 “Power-up Trouble Shooting” (DS00607). Preliminary is allowed to rise and stabilize before DD are tied together or the pin DD is stable DD rises too slowly. DD actually reach their full DD has not reached the V (min © 2005 Microchip Technology Inc. ...

Page 49

... MCLR Internal POR DRT Time-out Internal Reset FIGURE 7-10: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED TO V TIME V DD MCLR Internal POR DRT Time-out Internal Reset © 2005 Microchip Technology Inc. PIC12F508/509/16F505 POR (Power-on Reset) MCLR Reset Start-up Timer ( ms) TDRT Preliminary CHIP Reset ...

Page 50

... Internal Reset Note: When V rises slowly, the T DD value. In this example, the chip will reset properly if, and only if, V1 DS41236B-page 48 V1 TDRT time-out expires long before V DRT DD Preliminary ): SLOW V RISE DD DD has reached its final V min. DD © 2005 Microchip Technology Inc. ...

Page 51

... The WDT can be permanently disabled by program- ming the configuration WDTE as a ‘0’ (see Section 7.1 “Configuration Bits”). Refer to the PIC12F508/509/ 16F505 Programming Specifications to determine how to access the Configuration Word. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 TABLE 7-6: Oscillator Configuration ...

Page 52

... Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 T0SE PSA PS2 PS1 T0CS T0SE PSA PS2 PS1 Preliminary PS<2:0> (Figure 6-4) Value on Value on Power-On All Other Reset Resets PS0 1111 1111 1111 1111 PS0 1111 1111 1111 1111 © 2005 Microchip Technology Inc. ...

Page 53

... This brown-out protection circuit employs Microchip Technology’s MCP809 micro- controller supervisor. There are 7 different trip point selections to accommodate systems. goes DD Preliminary BROWN-OUT PROTECTION CIRCUIT PIC16F505 PIC12F508 Q1 (2) PIC12F509 MCLR (1) 40k is below a certain level such 0. BROWN-OUT PROTECTION CIRCUIT Bypass MCLR PIC16F505 PIC12F508 PIC12F509 DS41236B-page 51 ...

Page 54

... Load or a Read. For complete details of serial programming, please refer to the PIC12F508/509/16F505 Programming Specifications. A typical In-Circuit Serial Programming connection is shown in Figure 7-16. Preliminary ) pin from (see program- IL IHH GP1/RB1 becomes the © 2005 Microchip Technology Inc. ...

Page 55

... FIGURE 7-16: TYPICAL IN-CIRCUIT SERIAL PROGRAMMING CONNECTION To Normal Connections External Connector Signals + MCLR/V PP GP1/RB1 CLK Data I/O GP0/RB0 Normal Connections © 2005 Microchip Technology Inc. PIC12F508/509/16F505 PIC16F505 PIC12F508 PIC12F509 PP Preliminary DS41236B-page 53 ...

Page 56

... PIC12F508/509/16F505 NOTES: DS41236B-page 54 Preliminary © 2005 Microchip Technology Inc. ...

Page 57

... Register bit field < > In the set of User defined term (font is courier) italics © 2005 Microchip Technology Inc. PIC12F508/509/16F505 All instructions are executed within a single instruction cycle, unless a conditional test is true or the program counter is changed as a result of an instruction. In this case, the execution takes two instruction cycles. One instruction cycle consists of four oscillator periods ...

Page 58

... Preliminary © 2005 Microchip Technology Inc. Status Notes Affected LSb C, DC ffff ffff Z 4 ffff Z 0000 Z ffff ffff None 2, 4 ffff ffff None ...

Page 59

... The contents of the W register are AND’ed with register ‘f’. If ‘d’ is ‘0’, the result is stored in the W register. If ‘d’ is ‘1’, the result is stored back in register ‘f’. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 BCF Bit Clear f Syntax: ...

Page 60

... Operation: (f) (dest) Status Affected: Z Description: The contents of register ‘f’ are complemented. If ‘d’ is ‘0’, the result is stored in the W register. If ‘d’ is ‘1’, the result is stored back in register ‘f’. Preliminary © 2005 Microchip Technology Inc. (W); WDT; f,d ...

Page 61

... PC<10:9> Status Affected: None Description: GOTO is an unconditional branch. The 9-bit immediate value is loaded into PC bits <8:0>. The upper bits of PC are loaded from STATUS<6:5>. GOTO is a two- cycle instruction. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 INCF Increment f Syntax: [ label ] Operands ...

Page 62

... Operands: None Operation: No operation Status Affected: None Description: No operation. OPTION Load OPTION Register Syntax: [ label ] Operands: None Operation: (W) OPTION Status Affected: None Description: The content of the W register is loaded into the OPTION register. Preliminary © 2005 Microchip Technology Inc. MOVWF f NOP OPTION ...

Page 63

... Carry flag. If ‘d’ is ‘0’, the result is placed in the W register. If ‘d’ is ‘1’, the result is placed back in register ‘f’. register ‘f’ C © 2005 Microchip Technology Inc. PIC12F508/509/16F505 SLEEP Syntax: Operands: Operation: Status Affected: TO, PD, RBWUF ...

Page 64

... Status Affected: Z Description: Exclusive OR the contents of the W register with register ‘f’. If ‘d’ is ‘0’, the result is stored in the W register. If ‘d’ is ‘1’, the result is stored back in register ‘f’. Preliminary © 2005 Microchip Technology Inc. f,d dest) ...

Page 65

... PICSTART Plus Development Programmer - MPLAB PM3 Device Programmer • Low-Cost Demonstration and Development Boards and Evaluation Kits © 2005 Microchip Technology Inc. PIC12F508/509/16F505 9.1 MPLAB Integrated Development Environment Software The MPLAB IDE software brings an ease of software development previously unseen in the 8/16-bit micro- controller market ...

Page 66

... MPLAB C18 and MPLAB C30 C Compilers, and the MPASM and MPLAB ASM30 Assemblers. The software simulator offers the flexibility to develop and debug code outside of the laboratory environment, making it an excellent, economical software development tool. Preliminary ® DSCs on an © 2005 Microchip Technology Inc. ...

Page 67

... The PC platform and Microsoft Windows 32-bit operating system were chosen to best make these features available in a simple, unified application. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 9.9 MPLAB ICD 2 In-Circuit Debugger Microchip’s In-Circuit Debugger, MPLAB ICD ...

Page 68

... Sigma-Delta ADC, flow rate sensing, plus many more. Check the Microchip web page (www.microchip.com) and the latest “Product Selector Guide” (DS00148) for the complete list of demonstration, development and evaluation kits. Preliminary © 2005 Microchip Technology Inc. ® L security ICs, CAN ® ...

Page 69

... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 ............................................................................... -0. ...

Page 70

... PIC12F508/509/16F505 FIGURE 10-1: PIC12F508/509/16F505 VOLTAGE-FREQUENCY GRAPH, -40 C 6.0 5.5 5.0 4 (Volts) 4.0 3.5 3.0 2.5 2.0 0 FIGURE 10-2: MAXIMUM OSCILLATOR FREQUENCY TABLE LP XT INTOSC XTRC 200 kHz DS41236B-page Frequency (MHz) 4 MHz Frequency (MHz) Preliminary T +125 MHz © 2005 Microchip Technology Inc. ...

Page 71

... The Power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part in Sleep mode, with all I/O pins in high-impedance state and tied to V © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Standard Operating Conditions (unless otherwise specified) Operating Temperature -40 C ...

Page 72

... See Figure 10-1 V Device in Sleep mode V See Section 7.4 "DC Character- istics" for details See Section 7.4 "DC Character- istics" for details ( MHz 2.0V OSC MHz 3.0V OSC MHz 5.0V OSC kHz 2.0V, WDT OSC DD disabled 2. 2. T0CKI = © 2005 Microchip Technology Inc. ...

Page 73

... This specification applies to GP3/RB3/MCLR configured as external MCLR and GP3/RB3/MCLR configured as input with internal pull-up enabled. 6: This specification applies when GP3/RB3/MCLR is configured as an input with pull-up disabled. The leakage current of the MCLR circuit is higher than the standard I/O logic. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Standard Operating Conditions (unless otherwise specified) Operating temperature -40°C T +85° ...

Page 74

... TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD Preliminary Max Units TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD © 2005 Microchip Technology Inc. ...

Page 75

... Uppercase letters and their meanings Fall H High I Invalid (high-impedance) L Low FIGURE 10-3: LOAD CONDITIONS – PIC12F508/509/16F505 pin FIGURE 10-4: EXTERNAL CLOCK TIMING – PIC12F508/509/16F505 Q4 OSC1 © 2005 Microchip Technology Inc. PIC12F508/509/16F505 T Time mc MCLR osc Oscillator os OSC1 t0 T0CKI wdt Watchdog Timer P Period R Rise ...

Page 76

... LP Oscillator mode only) LP Oscillator mode XT Oscillator mode HS Oscillator mode (PIC16F505 only Oscillator mode EXTRC Oscillator mode XT Oscillator mode HS Oscillator mode (PIC16F505 only Oscillator mode XT Oscillator s LP Oscillator HS Oscillator (PIC16F505 only) XT Oscillator LP Oscillator HS Oscillator (PIC16F505 only) © 2005 Microchip Technology Inc. ...

Page 77

... I/O Pin (input) I/O Pin Old Value (output) Note: All tests must be done with specified capacitive loads (see data sheet I/O pins and CLKOUT. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Standard Operating Conditions (unless otherwise specified) Operating Temperature -40 C -40 C Operating Voltage V ...

Page 78

... Runs in MCLR or WDT Reset only in XT, LP and HS (PIC16F505) modes. DS41236B-page 76 - +85 C (industrial +125 C (extended) A range is described in Section 10.1 "DC Characteristics" DD Characteristic (2), (3) (2) (3) ( Preliminary (1) Min Typ Max Units — — 100* ns TBD — — ns TBD — — ns — 10 25** ns — © 2005 Microchip Technology Inc. ...

Page 79

... These parameters are characterized but not tested. Note 1: Data in the Typical (“Typ”) column unless otherwise stated. These parameters are for design guidance only and are not tested. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Standard Operating Conditions (unless otherwise specified) Operating Temperature -40 C ...

Page 80

... Section 10.1 "DC Characteristics" Min Typ No Prescaler 0 20* CY With Prescaler 10* No Prescaler 0 20* CY With Prescaler 10 40 Preliminary (1) Max Units Conditions — — ns — — ns — — ns — — ns — — ns Whichever is greater Prescale Value (1, 2, 4,..., 256) © 2005 Microchip Technology Inc. ...

Page 81

... DC AND AC CHARACTERISTICS GRAPHS AND CHARTS Graphs and charts are not available at this time. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Preliminary DS41236B-page 79 ...

Page 82

... PIC12F508/509/16F505 NOTES: DS41236B-page 80 Preliminary © 2005 Microchip Technology Inc. ...

Page 83

... Standard PICmicro device marking consists of Microchip part number, year code, week code, and traceability code. For PICmicro device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Example 12F508-I ...

Page 84

... Package Marking Information (Cont’d) 14-Lead PDIP (300 mil) XXXXXXXXXXXXXX XXXXXXXXXXXXXX YYWWNNN 14-Lead SOIC (150 mil) XXXXXXXXXXX XXXXXXXXXXX YYWWNNN 14-Lead TSSOP (150 mil) XXXXXXXX YYWW NNN DS41236B-page 82 Example PIC16F505-I/PG 0215 0410017 Example PIC16F505-E /SLG0125 0431017 Example 16F505-I 0431 017 Preliminary © 2005 Microchip Technology Inc. ...

Page 85

... Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018 © 2005 Microchip Technology Inc. PIC12F508/509/16F505 ...

Page 86

... Preliminary A2 MILLIMETERS MIN NOM MAX 8 1.27 1.35 1.55 1.75 1.32 1.42 1.55 0.10 0.18 0.25 5.79 6.02 6.20 3.71 3.91 3.99 4.80 4.90 5.00 0.25 0.38 0.51 0.48 0.62 0. 0.20 0.23 0.25 0.33 0.42 0. © 2005 Microchip Technology Inc. ...

Page 87

... Mold Draft Angle Top Mold Draft Angle Bottom *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MO-187 Drawing No. C04-111 © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Units ...

Page 88

... L p MILLIMETERS MIN NOM MAX 14 2.54 3.56 3.94 4.32 2.92 3.30 3.68 0.38 7.62 7.94 8.26 6.10 6.35 6.60 18.80 19.05 19.30 3.18 3.30 3.43 0.20 0.29 0.38 1.14 1.46 1.78 0.36 0.46 0.56 7.87 9.40 10. © 2005 Microchip Technology Inc. ...

Page 89

... Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-065 © 2005 Microchip Technology Inc. PIC12F508/509/16F505 ...

Page 90

... B .007 .010 .012 Preliminary A2 MILLIMETERS* MIN NOM MAX 14 0.65 1.10 0.85 0.90 0.95 0.05 0.10 0.15 6.25 6.38 6.50 4.30 4.40 4.50 4.90 5.00 5.10 0.50 0.60 0. 0.09 0.15 0.20 0.19 0.25 0. © 2005 Microchip Technology Inc. ...

Page 91

... APPENDIX A: REVISION HISTORY Revision A (April 2004) Original data sheet for PIC12F508/509/16F505 devices Revision B (June 2005) Update packages © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Preliminary DS41236B-page 89 ...

Page 92

... PIC12F508/509/16F505 NOTES: DS41236B-page 90 Preliminary © 2005 Microchip Technology Inc. ...

Page 93

... PORTB ............................................................................... 29 Power-down Mode.............................................................. 52 Prescaler ............................................................................ 36 Program Counter ................................................................ cycles .............................................................................. Oscillator....................................................................... 42 Reader Response............................................................... 94 Read-Modify-Write.............................................................. 31 Register File Map PIC12F508 ................................................................. 17 PIC12F509 ................................................................. 17 PIC16F505 ................................................................. 17 Registers Special Function ......................................................... 18 Reset .................................................................................. 39 Reset on Brown-Out ........................................................... 51 S Sleep ............................................................................ 39, 52 Software Simulator (MPLAB SIM) ...................................... 64 Special Features of the CPU .............................................. 39 Special Function Registers ................................................. 18 Stack................................................................................... 25 Status Register ............................................................... 9, 20 ...

Page 94

... PIC12F508/509/16F505 W Wake-up from Sleep ........................................................... 52 Watchdog Timer (WDT) ................................................ 39, 49 Period.......................................................................... 49 Programming Considerations ..................................... 49 WWW Address.................................................................... 93 WWW, On-Line Support........................................................ 3 Z Zero bit .................................................................................. 9 DS41236B-page 92 Preliminary © 2005 Microchip Technology Inc. ...

Page 95

... To register, access the Microchip web site at www.microchip.com, click on Customer Change Notification and follow the registration instructions. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: • ...

Page 96

... What deletions from the document could be made without affecting the overall usefulness there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS41236B-page 94 Total Pages Sent ________ FAX: (______) _________ - _________ N Literature Number: DS41236B Preliminary © 2005 Microchip Technology Inc. ...

Page 97

... Tape and Reel d) PIC12F508T-I/SN = Industrial temp., 150 mil SOIC package (Pb-free), Tape and Reel e) PIC12F508T-E/MS = Extended temp., MSOP package (Pb-free), Tape and Reel f) PIC12F509-E/P = Extended temp., PDIP package (Pb-free) g) PIC12F509-I/SM = Industrial temp., 208 mil SOIC package (Pb-free) Preliminary . = Industrial temp., PDIP DS41236B-page 95 ...

Page 98

... Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 Preliminary © 2005 Microchip Technology Inc. EUROPE Austria - Weis Tel: 43-7242-2244-399 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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