PIC12F509-I/P Microchip Technology Inc., PIC12F509-I/P Datasheet - Page 24

• Manufacturer Part Number: PIC12F509-I/P
• Description: 8 PIN, 1.5 KB FLASH, 41 RAM, 6 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC12F509-I/P

• Cpu Speed: 1 MIPS
• Eeprom Memory: 0 Bytes
• Frequency: 4 MHz
• Input Output: 6
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 8-pin PDIP
• Programmable Memory: 1.5K Bytes
• Ram Size: 41 Bytes
• Speed: 4 MHz
• Timers: 1-8-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC12F508/509/16F505
4.5
The OPTION register is a 8-bit wide, write-only register,
which contains various control bits to configure the
Timer0/WDT prescaler and Timer0.
By executing the OPTION instruction, the contents of
the W register will be transferred to the OPTION regis-
ter. A Reset sets the OPTION<7:0> bits.
REGISTER 4-3:
DS41236B-page 22
OPTION Register
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
OPTION REGISTER (PIC12F508/509)
GPWU: Enable Wake-up on Pin Change bit (GP0, GP1, GP3)
1 = Disabled
0 = Enabled
GPPU: Enable Weak Pull-ups bit (GP0, GP1, GP3)
1 = Disabled
0 = Enabled
T0CS: Timer0 Clock Source Select bit
1 = Transition on T0CKI pin (overrides TRIS on the T0CKI pin)
0 = Transition on internal instruction cycle clock, F
T0SE: Timer0 Source Edge Select bit
1 = Increment on high-to-low transition on the T0CKI pin
0 = Increment on low-to-high transition on the T0CKI pin
PSA: Prescaler Assignment bit
1 = Prescaler assigned to the WDT
0 = Prescaler assigned to Timer0
PS<2:0>: Prescaler Rate Select bits
Legend:
R = Readable bit
-n = Value at POR
GPWU
W-1
bit 7
Bit Value Timer0 Rate WDT Rate
000
001
010
011
100
101
110
111
GPPU
W-1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
T0CS
W-1
Preliminary
W = Writable bit
‘1’ = Bit is set
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
T0SE
W-1
Note:
Note:
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
OSC
PSA
W-1
If TRIS bit is set to ‘0’, the wake-up on
change and pull-up functions are disabled
for that pin (i.e., note that TRIS overrides
Option control of GPPU/RBPU and
GPWU/RBWU).
If the T0CS bit is set to ‘1’, it will override
the TRIS function on the T0CKI pin.
/4
PS2
W-1
© 2005 Microchip Technology Inc.
x = Bit is unknown
PS1
W-1
W-1
PS0
bit 0