PIC12F509-I/P Microchip Technology Inc., PIC12F509-I/P Datasheet - Page 46

• Manufacturer Part Number: PIC12F509-I/P
• Description: 8 PIN, 1.5 KB FLASH, 41 RAM, 6 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC12F509-I/P

• Cpu Speed: 1 MIPS
• Eeprom Memory: 0 Bytes
• Frequency: 4 MHz
• Input Output: 6
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 8-pin PDIP
• Programmable Memory: 1.5K Bytes
• Ram Size: 41 Bytes
• Speed: 4 MHz
• Timers: 1-8-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC12F508/509/16F505
7.3
The device differentiates between various kinds of
Reset:
• Power-on Reset (POR)
• MCLR Reset during normal operation
• MCLR Reset during Sleep
• WDT time-out Reset during normal operation
• WDT time-out Reset during Sleep
• Wake-up from Sleep on pin change
Some registers are not reset in any way, they are
unknown on POR and unchanged in any other Reset.
Most other registers are reset to “Reset state” on
Power-on Reset (POR), MCLR, WDT or Wake-up on
pin change Reset during normal operation. They are
not affected by a WDT Reset during Sleep or MCLR
Reset during Sleep, since these Resets are viewed as
resumption of normal operation. The exceptions to this
are TO, PD and RBWUF/GPWUF bits. They are set or
cleared differently in different Reset situations. These
bits are used in software to determine the nature of
Reset. See Table 7-4 for a full description of Reset
states of all registers.
TABLE 7-3:
DS41236B-page 44
W
INDF
TMR0
PC
STATUS
FSR
FSR
OSCCAL
GPIO
OPTION
TRIS
Legend: u = unchanged, x = unknown, – = unimplemented bit, read as ‘0’, q = value depends on condition.
Note 1:
(4)
(5)
Register
2:
3:
4:
5:
Reset
Bits <7:2> of W register contain oscillator calibration values due to MOVLW XX instruction at top of mem-
ory.
See Table 7-8 for Reset value for specific conditions.
If Reset was due to wake-up on pin change, then bit 7 = 1. All other Resets will cause bit 7 = 0.
PIC12F509 only.
PIC12F508 only.
RESET CONDITIONS FOR REGISTERS – PIC12F508/509
Address
00h
01h
02h
03h
04h
04h
05h
06h
—
—
—
Preliminary
Power-on Reset
qqqq qqqu
xxxx xxxx
xxxx xxxx
1111 1111
0001 1xxx
110x xxxx
111x xxxx
1111 111-
--xx xxxx
1111 1111
--11 1111
7.3.1
For applications where a clock is already available
elsewhere, users may directly drive the PIC12F508/
509/16F505 devices provided that this external clock
source meets the AC/DC timing requirements listed in
Section 7.6 “Watchdog Timer (WDT)”. Figure 7-6
below shows how an external clock circuit should be
configured.
FIGURE 7-6:
OSC2/CLKOUT/RB4
PIC16F505: EC, HS, XT, LP
PIC12F508/509: XT, LP
Note 1: RB4 is available in EC mode only.
Clock From
ext. system
Clock From
ext. system
(1)
OSC2
EXTERNAL CLOCK IN
MCLR Reset, WDT Time-out,
Wake-up On Pin Change
EXTERNAL CLOCK INPUT
OPERATION
© 2005 Microchip Technology Inc.
qqqq qqqu
uuuu uuuu
uuuu uuuu
1111 1111
q00q quuu
11uu uuuu
111u uuuu
uuuu uuu-
--uu uuuu
1111 1111
--11 1111
OSC2/CLKOUT/RB4
GP4/OSC2
RB5/OSC1/CLKIN
PIC16F505
GP5/OSC1/CLKIN
PIC12F508
PIC12F509
(1)
(2), (3)
(1)