PIC12F509-I/P Microchip Technology Inc., PIC12F509-I/P Datasheet - Page 33

• Manufacturer Part Number: PIC12F509-I/P
• Description: 8 PIN, 1.5 KB FLASH, 41 RAM, 6 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC12F509-I/P

• Cpu Speed: 1 MIPS
• Eeprom Memory: 0 Bytes
• Frequency: 4 MHz
• Input Output: 6
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 8-pin PDIP
• Programmable Memory: 1.5K Bytes
• Ram Size: 41 Bytes
• Speed: 4 MHz
• Timers: 1-8-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

5.5
5.5.1
Some instructions operate internally as read followed
by write operations. The BCF and BSF instructions, for
example, read the entire port into the CPU, execute the
bit operation and re-write the result. Caution must be
used when these instructions are applied to a port
where one or more pins are used as input/outputs. For
example, a BSF operation on bit 5 of PORTB/GPIO will
cause all eight bits of PORTB/GPIO to be read into the
CPU, bit 5 to be set and the PORTB/GPIO value to be
written to the output latches. If another bit of PORTB/
GPIO is used as a bidirectional I/O pin (say bit 0) and it
is defined as an input at this time, the input signal
present on the pin itself would be read into the CPU and
rewritten to the data latch of this particular pin, overwrit-
ing the previous content. As long as the pin stays in the
Input mode, no problem occurs. However, if bit 0 is
switched into Output mode later on, the content of the
data latch may now be unknown.
Example 5-1 shows the effect of two sequential
Read-Modify-Write instructions (e.g., BCF, BSF, etc.)
on an I/O port.
A pin actively outputting a high or a low should not be
driven from external devices at the same time in order
to change the level on this pin (“wired OR”, “wired
AND”). The resulting high output currents may damage
the chip.
FIGURE 5-2:
© 2005 Microchip Technology Inc.
Instruction
Instruction
Executed
RB<5:0>
Fetched
I/O Programming Considerations
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
MOVWF PORTB
BIDIRECTIONAL I/O PORTS
PC
SUCCESSIVE I/O OPERATION (PIC16F505 Shown)
MOVF PORTB, W
(Write to PORTB)
MOVWF PORTB
Port pin
written here
PC + 1
MOVF PORTB,W
(Read PORTB)
Port pin
sampled here
NOP
PC + 2
Preliminary
PIC12F508/509/16F505
PC + 3
NOP
NOP
EXAMPLE 5-1:
5.5.2
The actual write to an I/O port happens at the end of an
instruction cycle, whereas for reading, the data must be
valid at the beginning of the instruction cycle (Figure 5-2).
Therefore, care must be exercised if a write followed by
a read operation is carried out on the same I/O port. The
sequence of instructions should allow the pin voltage to
stabilize (load dependent) before the next instruction
causes that file to be read into the CPU. Otherwise, the
previous state of that pin may be read into the CPU rather
than the new state. When in doubt, it is better to separate
these instructions with a NOP or another instruction not
accessing this I/O port.
;Initial PORTB Settings
;PORTB<5:3> Inputs
;PORTB<2:0> Outputs
;
;
;
;
Note 1:
BCF
BCF
MOVLW
TRIS
PORTB, 5 ;--01 -ppp
PORTB, 4 ;--10 -ppp
007h;
PORTB
The user may have expected the pin values to
be ‘--00 pppp’. The 2nd BCF caused RB5 to
be latched as the pin value (High).
SUCCESSIVE OPERATIONS ON
I/O PORTS
This example shows a write to PORTB
followed by a read from PORTB.
Data setup time = (0.25 T
where: T
Therefore, at higher clock frequencies, a
write followed by a read may be problematic.
T
CY
PD
;--10 -ppp
PORTB latch
----------
READ-MODIFY-WRITE
INSTRUCTIONS ON AN
I/O PORT(e.g. PIC16F505)
= instruction cycle.
= propagation delay
CY
DS41236B-page 31
– T
PORTB pins
----------
--11 pppp
--11 pppp
--11 pppp
PD
)