PIC24FJ256DA210-I/PT Microchip Technology Inc., PIC24FJ256DA210-I/PT Datasheet - Page 110

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PIC24FJ256DA210-I/PT

Manufacturer Part Number
PIC24FJ256DA210-I/PT
Description
100 TQFP 12x12x1mm TRAY, 16-bit, 256KB Flash, 96K RAM, USB, Graphics
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC24FJ256DA210-I/PT

A/d Inputs
24 Channel, 10-Bit
Comparators
3
Cpu Speed
16 MIPS
Eeprom Memory
0 Bytes
Input Output
84
Interface
I2C/SPI/UART
Memory Capacity
256 Kbytes
Memory Type
Flash
Number Of Bits
16
Number Of Leads
100
Number Of Pins
100
Package Type
100-Pin TQFP
Programmable Memory
256K Bytes
Ram Size
96K Bytes
Speed
32 MHz
Temperature Range
–40 to +85 °C
Timers
5-16-bit
Voltage, Range
2.2-3.6 V
Voltage, Rating
2.2-3.6 V
Run Mode
800 μA/MIPS, 3.3 V Typical
Standby Current With 32 Khz Oscillator
22 μA, 3.3 V Typical
Lead Free Status / Rohs Status
RoHS Compliant part

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PIC24FJ256DA210 FAMILY
REGISTER 7-12:
REGISTER 7-13:
DS39969B-page 110
bit 1
bit 0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
Note 1:
U2TXIE
R/W-0
R/W-0
IC8IE
If an external interrupt is enabled, the interrupt input must also be configured to an available RPx or RPIx
pin. See Section 10.4 “Peripheral Pin Select (PPS)” for more information.
IC1IE: Input Capture Channel 1 Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
INT0IE: External Interrupt 0 Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
U2TXIE: UART2 Transmitter Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
U2RXIE: UART2 Receiver Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
INT2IE: External Interrupt 2 Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
T5IE: Timer5 Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
T4IE: Timer4 Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
OC4IE: Output Compare Channel 4 Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
OC3IE: Output Compare Channel 3 Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
Unimplemented: Read as ‘0’
IC8IE: Input Capture Channel 8 Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
U2RXIE
R/W-0
R/W-0
IC7IE
IEC0: INTERRUPT ENABLE CONTROL REGISTER 0 (CONTINUED)
IEC1: INTERRUPT ENABLE CONTROL REGISTER 1
W = Writable bit
‘1’ = Bit is set
INT2IE
R/W-0
U-0
(1)
INT1IE
R/W-0
R/W-0
T5IE
(1)
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
CNIE
T4IE
OC4IE
R/W-0
R/W-0
CMIE
 2010 Microchip Technology Inc.
x = Bit is unknown
MI2C1IE
OC3IE
R/W-0
R/W-0
SI2C1IE
R/W-0
U-0
bit 8
bit 0

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