PIC24FJ256DA210-I/PT Microchip Technology Inc., PIC24FJ256DA210-I/PT Datasheet - Page 323

• Manufacturer Part Number: PIC24FJ256DA210-I/PT
• Description: 100 TQFP 12x12x1mm TRAY, 16-bit, 256KB Flash, 96K RAM, USB, Graphics
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24FJ256DA210-I/PT

• A/d Inputs: 24 Channel, 10-Bit
• Comparators: 3
• Cpu Speed: 16 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 84
• Interface: I2C/SPI/UART
• Memory Capacity: 256 Kbytes
• Memory Type: Flash
• Number Of Bits: 16
• Number Of Leads: 100
• Number Of Pins: 100
• Package Type: 100-Pin TQFP
• Programmable Memory: 256K Bytes
• Ram Size: 96K Bytes
• Speed: 32 MHz
• Temperature Range: –40 to +85 °C
• Timers: 5-16-bit
• Voltage, Range: 2.2-3.6 V
• Voltage, Rating: 2.2-3.6 V
• Run Mode: 800 μA/MIPS, 3.3 V Typical
• Standby Current With 32 Khz Oscillator: 22 μA, 3.3 V Typical
• Lead Free Status / Rohs Status: RoHS Compliant part

REGISTER 22-32: G1DBEN: DATA I/O PAD ENABLE REGISTER
 2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
GDBEN15
GDBEN7
R/W-0
R/W-0
GDBEN<15:0>: Display Data Pads Output Enable bits
1 = Corresponding display data (GD<x>) pin is enabled
0 = Corresponding display data (GD<x>) pin is disabled
GDBEN<15:0> can be used to disable or enable specific data signals while the DPPINOE bit
(G1CON3<9>) is set.
GDBEN14
DPPINOE
GDBEN6
R/W-0
R/W-0
1
1
0
W = Writable bit
‘1’ = Bit is set
(where x = 0 to 15)
GDBEN13
GDBEN5
GDBENx
R/W-0
R/W-0
1
0
x
PIC24FJ256DA210 FAMILY
Display data signal (GD) associated with GDBENx is enabled.
Display data signal (GD) associated with GDBENx is disabled.
Display data signal (GD) associated with GDBENx is disabled.
GDBEN12
GDBEN4
R/W-0
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
GDBEN11
GDBEN3
R/W-0
R/W-0
GDBEN10
GDBEN2
R/W-0
R/W-0
x = Bit is unknown
GDBEN9
GDBEN1
R/W-0
R/W-0
DS39969B-page 323
GDBEN8
GDBEN0
R/W-0
R/W-0
bit 8
bit 0