PIC24FJ256DA210-I/PT Microchip Technology Inc., PIC24FJ256DA210-I/PT Datasheet - Page 146

• Manufacturer Part Number: PIC24FJ256DA210-I/PT
• Description: 100 TQFP 12x12x1mm TRAY, 16-bit, 256KB Flash, 96K RAM, USB, Graphics
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24FJ256DA210-I/PT

• A/d Inputs: 24 Channel, 10-Bit
• Comparators: 3
• Cpu Speed: 16 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 84
• Interface: I2C/SPI/UART
• Memory Capacity: 256 Kbytes
• Memory Type: Flash
• Number Of Bits: 16
• Number Of Leads: 100
• Number Of Pins: 100
• Package Type: 100-Pin TQFP
• Programmable Memory: 256K Bytes
• Ram Size: 96K Bytes
• Speed: 32 MHz
• Temperature Range: –40 to +85 °C
• Timers: 5-16-bit
• Voltage, Range: 2.2-3.6 V
• Voltage, Rating: 2.2-3.6 V
• Run Mode: 800 μA/MIPS, 3.3 V Typical
• Standby Current With 32 Khz Oscillator: 22 μA, 3.3 V Typical
• Lead Free Status / Rohs Status: RoHS Compliant part

PIC24FJ256DA210 FAMILY
REGISTER 8-2:
REGISTER 8-3:
DS39969B-page 146
bit 5
bit 4
bit 3-0
Note 1:
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-6
bit 5-0
Note 1:
U-0
U-0
—
—
2:
This bit is automatically cleared when the ROI bit is set and an interrupt occurs.
This setting is not allowed while the USB module is enabled.
Increments or decrements of TUN<5:0> may not change the FRC frequency in equal steps over the FRC
tuning range and may not be monotonic.
PLLEN: 96 MHz PLL Enable bit
The 96 MHz PLL must be enabled when the USB or graphics controller module is enabled. This control
bit can be overridden by the PLL96MHZ (Configuration Word 2 <11>) Configuration bit.
1 = Enable the 96 MHz PLL for USB, graphics controller or HSPLL/ECPLL/FRCPLL operation
0 = Disable the 96 MHz PLL
G1CLKSEL: Display Controller Module Clock Select bit
1 = Use the 96 MHz clock as a graphics controller module clock
0 = Use the 48 MHz clock as a graphics controller module clock
Unimplemented: Read as ‘0’
Unimplemented: Read as ‘0’
TUN<5:0>: FRC Oscillator Tuning bits
011111 = Maximum frequency deviation
011110 =
·
·
·
000001 =
000000 = Center frequency, oscillator is running at factory calibrated frequency
111111 =
·
·
·
100001 =
100000 = Minimum frequency deviation
U-0
U-0
—
—
CLKDIV: CLOCK DIVIDER REGISTER (CONTINUED)
OSCTUN: FRC OSCILLATOR TUNE REGISTER
W = Writable bit
‘1’ = Bit is set
TUN5
R/W-0
U-0
—
(1)
TUN4
R/W-0
U-0
—
(1)
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
TUN3
R/W-0
U-0
—
(1)
TUN2
R/W-0
U-0
—
(1)
 2010 Microchip Technology Inc.
x = Bit is unknown
TUN1
R/W-0
U-0
—
(1)
TUN0
R/W-0
U-0
—
(1)
bit 8
bit 0