PIC24FJ256DA210-I/PT Microchip Technology Inc., PIC24FJ256DA210-I/PT Datasheet - Page 331

• Manufacturer Part Number: PIC24FJ256DA210-I/PT
• Description: 100 TQFP 12x12x1mm TRAY, 16-bit, 256KB Flash, 96K RAM, USB, Graphics
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24FJ256DA210-I/PT

• A/d Inputs: 24 Channel, 10-Bit
• Comparators: 3
• Cpu Speed: 16 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 84
• Interface: I2C/SPI/UART
• Memory Capacity: 256 Kbytes
• Memory Type: Flash
• Number Of Bits: 16
• Number Of Leads: 100
• Number Of Pins: 100
• Package Type: 100-Pin TQFP
• Programmable Memory: 256K Bytes
• Ram Size: 96K Bytes
• Speed: 32 MHz
• Temperature Range: –40 to +85 °C
• Timers: 5-16-bit
• Voltage, Range: 2.2-3.6 V
• Voltage, Rating: 2.2-3.6 V
• Run Mode: 800 μA/MIPS, 3.3 V Typical
• Standby Current With 32 Khz Oscillator: 22 μA, 3.3 V Typical
• Lead Free Status / Rohs Status: RoHS Compliant part

REGISTER 23-5:
REGISTER 23-6:
 2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-3
bit 2
bit 1
bit 0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
CSSL15
CSSL7
R/W-0
R/W-0
U-0
U-0
—
—
Unimplemented: Read as ‘0’
VBG6EN: A/D Input V
1 = Band gap voltage divided-by-six reference (V
0 = Band gap divided-by-six reference (V
VBG2EN: A/D Input V
1 = Band gap voltage divided-by-two reference (V
0 = Band gap divided-by-two reference (V
VBGEN: A/D Input V
1 = Band gap voltage reference (V
0 = Band gap reference (V
CSSL<15:0>: A/D Input Pin Scan Selection bits
1 = Corresponding analog channel is selected for input scan
0 = Analog channel is omitted from input scan
CSSL14
CSSL6
R/W-0
R/W-0
U-0
U-0
—
—
ANCFG: A/D BAND GAP REFERENCE CONFIGURATION REGISTER
AD1CSSL: A/D INPUT SCAN SELECT REGISTER (LOW)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
CSSL13
CSSL5
R/W-0
R/W-0
U-0
U-0
—
—
BG
BG
BG
Enable bit
/6 Enable bit
/2 Enable bit
BG
) is disabled
PIC24FJ256DA210 FAMILY
CSSL12
CSSL4
R/W-0
R/W-0
U-0
U-0
—
—
BG
) is enabled
BG
BG
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
/6) is disabled
/2) is disabled
CSSL11
CSSL3
R/W-0
R/W-0
U-0
U-0
—
—
BG
BG
/6) is enabled
/2) is enabled
VBG6EN
CSSL10
CSSL2
R/W-0
R/W-0
R/W-0
U-0
—
x = Bit is unknown
x = Bit is unknown
VBG2EN
CSSL9
CSSL1
R/W-0
R/W-0
R/W-0
U-0
—
DS39969B-page 331
VBGEN
CSSL8
CSSL0
R/W-0
R/W-0
R/W-0
U-0
—
bit 8
bit 0
bit 8
bit 0