ICS1893CY-10LFT IDT, Integrated Device Technology Inc, ICS1893CY-10LFT Datasheet - Page 105
ICS1893CY-10LFT
Manufacturer Part Number
ICS1893CY-10LFT
Description
PHYCEIVER LOW PWR 3.3V 64-TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
PHYceiver™r
Type
PHY Transceiverr
Datasheet
1.ICS1893CY-10LFT.pdf
(143 pages)
Specifications of ICS1893CY-10LFT
Protocol
MII
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Other names
1893CY-10LFT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ICS1893CY-10LFT
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
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ICS1893CY-10 Rev 1/07
Table 8-4. Configuration Pins (Continued)
DPXSEL
HW/SW
LOCK
LSTA
MII/SI
NOD/REP
Name
ICS1893CY-10 - Release
Pin
Number
Pin
24
23
27
21
19
1
Input or
Output
Output
Output
Type
Input
Input
Input
Pin
Copyright © 2007, Integrated Device Technology, Inc.
Half-Duplex / Full-Duplex Select.
The ‘Pin Type’ for this pin depends on the setting for the HW/SW pin
(pin 23). When the HW/SW pin is set for:
Hardware/Software (Select).
When the signal on this pin is logic:
(Stream Cipher) Lock (Acquired).
When the signal on this pin is logic:
Link Status.
This pin is used to report the status of the link segment. When the
signal on this pin is logic:
Media Independent Interface / Stream Interface (Select).
This pin is used in combination with the 10/100SEL pin to configure
the ICS1893CY-10 MAC/Repeater Interface. When the signal on this
pin is logic:
Node/Repeater (Select).
This selection on this pin affects both the SQE test and the Carrier
Sense (CSR) signal. When the signal on this pin is logic:
•
•
•
•
•
•
•
•
•
•
•
•
Hardware mode, this pin acts as an input. In this case, when the
signal on this pin is logic:
– Low, this pin selects half-duplex operations.
– High, this pin selects full-duplex operations.
Software mode, this pin acts as an output that indicates the current
status of this pin. In this case, when the signal on this pin is logic:
– Low, this pin indicates that it is set for half-duplex operations.
– High, this pin indicates that it is set for full-duplex operations.
Low, this pin selects Hardware mode operations.
High, this pin selects Software mode operations.
Low, the ICS1893CY-10 does not have a lock on the data stream.
High, the ICS1893CY-10 has a lock on the data stream.
Low, there is no link established.
High, there is a link established.
Low, this pin configures the MAC/Repeater Interface as a Media
Independent Interface.
High, this pin configures the MAC/Repeater Interface as a Stream
Interface in 100Base-TX or Serial Interface in 10Base-T.
Low, this pin enables the ICS1893CY-10 to default to node
operations.
High, this pin enables the ICS1893CY-10 to default to repeater
operations.
All rights reserved.
105
Chapter 8 Pin Diagram, Listings, and Descriptions
Pin Description
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