ICS1893CY-10LFT IDT, Integrated Device Technology Inc, ICS1893CY-10LFT Datasheet - Page 73

• Manufacturer Part Number: ICS1893CY-10LFT
• Description: PHYCEIVER LOW PWR 3.3V 64-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: PHYceiver™r
• Type: PHY Transceiverr

Specifications of ICS1893CY-10LFT

• Protocol: MII
• Voltage - Supply: 3.14 V ~ 3.47 V
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Other names: 1893CY-10LFT

7.6.1 Next Page (bit 4.15)
7.6.2 IEEE Reserved Bit (bit 4.14)
7.6.3 Remote Fault (bit 4.13)
7.6.4 IEEE Reserved Bits (bits 4.12:10)
ICS1893CY-10 Rev 1/07
This bit indicates whether the ICS1893CY-10 uses the Next Page Mode functions during the
auto-negotiation process. If bit 4.15 is logic:
•
•
The ISO/IEC specification reserves this bit for future use. However, the ISO/IEC Standard also defines bit
4.14 as the Acknowledge bit.
When this reserved bit is read by an STA, the ICS1893CY-10 returns a logic zero. However, whenever an
STA writes to this reserved bit, it must use the default value specified in this data sheet. ICS uses some
reserved bits to invoke auxiliary functions. To ensure proper operation of the ICS1893CY-10, an STA must
maintain the default value of these bits. Therefore, ICS recommends that an STA always write the default
value of any reserved bits during all management register write operations.
Reserved bit 4.14 is a Command Override Write (CW) bit. Whenever bit 16.15 (the Command Register
Override bit) is logic:
•
•
When the ICS1893CY-10 Auto-Negotiation sublayer is enabled, the ICS1893CY-10 transmits the Remote
Fault bit 4.13 to its remote link partner during the auto-negotiation process. The Remote Fault bit is part of
the Link Code Word that the ICS1893CY-10 exchanges with its remote link partner. The ICS1893CY-10 sets
this bit to logic one whenever it detects a problem with the link, locally. The data in this register is sent to the
remote link partner to inform it of the potential problem. If the ICS1893CY-10 does not detect a link fault, it
clears bit 4.13 to logic zero.
Whenever the ICS1893CY-10:
•
•
The IEEE reserves these bits for future use. When an STA:
•
•
The ICS1893CY-10 uses some reserved bits to invoke auxiliary functions. To ensure proper operation of
the ICS1893CY-10, an STA must maintain the default value of these bits. Therefore, ICS recommends that
during any STA write operation, an STA write the default value to all reserved bits, even those bits that are
Read Only.
Zero, then the ICS1893CY-10 indicates to its remote link partner that these features are disabled.
(Although the default value of this bit is logic zero, the ICS1893CY-10 does support the Next Page
function.)
One, then the ICS1893CY-10 advertises to its remote link partner that this feature is enabled.
Zero, the ICS1893CY-10 isolates all STA writes to bit 4.14.
One, an STA can modify the value of bit 4.14.
Does not detect a link fault, the ICS1893CY-10 clears bit 4.13 to logic zero.
Detects a problem with the link, during the auto-negotiation process, this bit is set. As a result, the data
on this bit is sent to the remote link partner to inform it of the potential problem.
Reads a reserved bit, the ICS1893CY-10 returns a logic zero.
Writes to a reserved bit, it must use the default value specified in this data sheet.
ICS1893CY-10 - Release
Copyright © 2007, Integrated Device Technology, Inc.
All rights reserved.
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Chapter 7 Management Register Set