ICS1893CY-10LFT IDT, Integrated Device Technology Inc, ICS1893CY-10LFT Datasheet - Page 41

• Manufacturer Part Number: ICS1893CY-10LFT
• Description: PHYCEIVER LOW PWR 3.3V 64-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: PHYceiver™r
• Type: PHY Transceiverr

Specifications of ICS1893CY-10LFT

• Protocol: MII
• Voltage - Supply: 3.14 V ~ 3.47 V
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Other names: 1893CY-10LFT

6.2.5 Auto-Negotiation: Progress Monitor
ICS1893CY-10 Rev 1/07
Any of the following situations initiates a restart of the ICS1893CY-10 Auto-Negotiation sublayer:
•
•
•
Under typical circumstances, the Auto-Negotiation sublayer can establish a connection with the
ICS1893CY-10’s remote link partner. However, some situations can prevent the auto-negotiation process
from properly achieving this goal. For these situations, the ICS1893CY-10 has an Auto-Negotiation
Progress Monitor to provide detailed status information to its Station Management (STA) entity. With this
status information, the STA can diagnose the failure mechanism and – in some situations – establish the
link by correcting the problem.
When enabled, the auto-negotiation process typically requires less than 500 ms to execute, independent of
the link partner's ability to perform the auto-negotiation process. Typically, an STA polls both the
Auto-Negotiation Complete bit (bit 1.5) and the Link Status bit (bit 1.2) to determine when a link is
successfully established, either through auto-negotiation or parallel detection. The STA can then poll the
Auto-Negotiation Link Partner Ability Register and determine the highest-performance operating mode in
common with the capabilities it is advertising.
The ISO/IEC-defined priority table determines the established link type. As a simpler alternative, the STA
can read the QuickPoll Detailed Status Register and determine the link type from the Data Rate bit (bit
17.15) and the Duplex bit (bit 17.14). For convenience, the QuickPoll Register also includes the Link Status
bit (bit 17.0) and the Auto-Negotiation Complete bit (bit 17.4).
If (1) the auto-negotiation process does not complete, or (2) the link is not established, or (3) both the
auto-negotiation process does not complete and the link is not established, then the STA can determine the
cause of the link failure by using the outputs of the ICS1893CY-10 Auto-Negotiation Progress Monitor.
The Auto-Negotiation Progress Monitor provides the STA with four status bits of data to indicate both the
history and the present state of the auto-negotiation process. This status data is provided in the QuickPoll
Detailed Status register by using the Auto-Negotiation Complete bit (bit 17.4) as well as bits 17.13:11. The
bit order, from most-significant bit to least-significant bit, is 17.4, 17.13, 17.12, and 17.11. Using these four
bits, the Auto-Negotiation Progress Monitor provides nine state codes detailing the operation of the
auto-negotiation process for the STA. [For more information, see
Progress Monitor (bits
The nine Auto-Negotiation Progress Monitor state codes are 0h through 8h and Fh. The Auto-Negotiation
Progress Monitor automatically latches the values of the Auto-Negotiation Arbitration State Machine into
the status bits only if the value of the present state is greater than the value that is currently in the status
bits.
For example, if the status bits have a value of 3h and the auto-negotiation process moves into:
•
•
A link failure
In software mode:
In hardware mode:
State 1, the Auto-Negotiation Progress Monitor does not update the status bits to indicate the new state.
State 5, the Auto-Negotiation Progress Monitor updates the status bits to indicate the new state, State 5.
In this case, the status bits increase in value until either the auto-negotiation process successfully
completes or the STA reads the Auto-Negotiation Progress Monitor status bits.
– Writing a logic one to the Control Register’s Restart Auto-Negotiation bit (bit 0.9), which is a self-
– Toggling the Control Register’s Auto-Negotiation Enable bit (bit 0.12) from a logic one to a logic zero,
– Toggling the ANSEL (Auto-Negotiation Select) pin from a logic one to a logic zero, and back to a logic
ICS1893CY-10 - Release
clearing bit.
and back to a logic one.
one.
17.13:11)”.]
Copyright © 2007, Integrated Device Technology, Inc.
All rights reserved.
41
Section 7.12.3, “Auto-Negotiation
Chapter 6 Functional Blocks