ECOG1X5A5L CYAN, ECOG1X5A5L Datasheet - Page 30

• Manufacturer Part Number: ECOG1X5A5L
• Description: MCU, 16BIT, 512K FLASH, USB, 68QFN
• Manufacturer: CYAN

Specifications of ECOG1X5A5L

• Core Size: 16bit
• No. Of I/o's: 32
• Program Memory Size: 512KB
• Ram Memory Size: 24KB
• Cpu Speed: 70MHz
• Oscillator Type: External, Internal
• No. Of Timers: 5
• No. Of Pwm Channels: 2
• Rohs Compliant: Yes
• Controller Family/series: ECOG1X

Version 1.17
External Memory Interface
External Host Interface
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The External Memory Interface (EMI) allows connection of external memories to both code and data
space of the CPU via the memory manager.
The EMI supports two memory interface modes:
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The EMI has two chip select outputs that can be programmed individually to operate with either the
SDRAM or Bus interfaces. If both chip selects are configured for the same interface type, then the
settings are the same for both external memories. This means that the memories’ timing parameters
and control signals must be compatible.
The EMI peripheral includes the following features.
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The External Host Interface (EHI) allows the eCOG1X and an external processor to share an area of
the eCOG1X internal SRAM which can be directly accessed by both the eCOG1X processor and the
external device. The eCOG1X processor can write and read to the locations via the MMU, whilst the
external device can write and read to the locations via the EHI.
The external device has two modes in which it can access the internal SRAM. In MMP mode, the
eCOG1X is seen as a memory mapped peripheral and the shared SRAM area is mapped into the
memory map of the external device. In DMA mode, the external device accesses the shared SRAM
area using the DMA control signals.
MMP mode is intended for small random accesses, whilst DMA mode is intended for large block copy
data transfers. The EHI provides a means for enabling both modes to assist the interleaving of large
and small data accesses.
The EHI peripheral includes the following features.
DMA mode:
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MMP mode:
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Bus Interface Mode:
(a) Independent 25-bit address and 8-bit data, or
(b) Multiplexed 24-bit address and 16-bit data.
This interface can connect to external devices such as flash memory, SRAM, ROM or memory
mapped peripherals.
SDRAM Interface Mode:
Supports direct connection to 16-bit wide single data rate SDRAM (up to 32Mbytes) with no
external components.
8 or 16-bit data bus.
16 or 24-bit address bus.
Multiplexed address/data in 16-bit data bus mode.
External devices can be mapped into both code and data space.
Configurable cycle and signal timing.
Four SDRAM row/column address multiplexing schemes.
Supports SDRAM auto and self refresh.
Supports low-power SDRAM suspend/standby modes.
Single cycle data space accesses.
Burst accesses in code space, using instruction cache.
Add wait states for slow devices with the EMI_WAIT input signal.
Supports master and slave mode timings.
16 or 32-bit data bus.
Request and acknowledge control signals.
Programmable transfer cycle timing in master mode.
DMA connection into internal SRAM.
11-bit block address, maximum block size 256 bytes.
Selectable block size: 256 x 16-bit data, or 8 x 32-bit data.
Three control signals: chip select, read/write direction, and wait.
Configurable control signal senses.
eCOG and CyanIDE are registered trademarks of Cyan Holdings plc
eCOG1X Microcontroller Product Family
www.cyantechnology.com
11 February 2010