ECOG1X5A5L CYAN, ECOG1X5A5L Datasheet - Page 69

• Manufacturer Part Number: ECOG1X5A5L
• Description: MCU, 16BIT, 512K FLASH, USB, 68QFN
• Manufacturer: CYAN

Specifications of ECOG1X5A5L

• Core Size: 16bit
• No. Of I/o's: 32
• Program Memory Size: 512KB
• Ram Memory Size: 24KB
• Cpu Speed: 70MHz
• Oscillator Type: External, Internal
• No. Of Timers: 5
• No. Of Pwm Channels: 2
• Rohs Compliant: Yes
• Controller Family/series: ECOG1X

11 February 2010
Symbol
t
t
t
t
R
t
t
t
t
CKA
CSA
CSD
t
t
CKI
CSI
t
CD
DH
DV
DS
, t
DI
Master mode
F
SCLK output
SCLK output
SCLK output
SCLK output
clk_pol = 1
clk_pol = 0
clk_pol = 1
clk_pol = 0
Parameter
SCLK output rise and fall time
SCLK output active time
SCLK output inactive time
Delay time from chip select active to first SCLK edge
Delay time from last SCLK edge to chip select
inactive
Sequential transfer delay time
Delay time from chip select active to MOSI output valid
Delay time SCLK to MOSI output
Delay time from chip select inactive to MOSI output
invalid
Setup time MISO input valid to SCLK
Hold time SCLK to MISO input invalid
output
output
output
output
MOSI
MISO
MISO
MOSI
input
input
CSn
CSn
eCOG and CyanIDE are registered trademarks of Cyan Holdings plc
Figure 20: SPI timing diagram, master mode, clk_pha = 0
Figure 21: SPI timing diagram, master mode, clk_pha = 1
t
CSA
t
msb in
CSA
Table 37: AC characteristics - SPI master mode
t
DV
msb out
eCOG1X Microcontroller Product Family
t
CKA
msb in
t
CD
t
msb out
CKA
www.cyantechnology.com
t
t
t
R
F
CKI
t
CKI
t
CD
data
data
data
data
t
t
R
F
clk_pha = 0
clk_pha = 1
clk_pha = 0
clk_pha = 1
clk_pha = 0
clk_pha = 1
t
t
F
R
t
DS
lsb in
lsb out
t
DS
t
lsb in
DH
lsb out
t
t
R
F
Min
T
T
t
DH
CLK
CLK
(1 x T
(1 x T
t
DI
t
CSI
t
See Table 28
CSI
x (N
x (N
T
BIT
BIT
t
1 x T
1 x T
1 x T
DI
1 x t
CLK
Typ
S
S
) + (1 x t
) + (1 x t
+1) x (N
+1) x (N
x N
CKI
t
t
BIT
BIT
BIT
CSD
CSD
S
CKI
CKI
Max
H
L
Version 1.17
26
+1)
+1)
5
9
5
)
)
msb out
msb in
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
msb
msb
69