PSB21150FV14XT Infineon Technologies, PSB21150FV14XT Datasheet - Page 88
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PSB21150FV14XT
Manufacturer Part Number
PSB21150FV14XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSB21150FV14XT.pdf
(270 pages)
Specifications of PSB21150FV14XT
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
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G4 Wait for DR
Final state after a deactivation request. The transceiver remains in this state until DC is
issued.
Unconditional States
Test Mode SSP
Send Single Pulses
Test Mode SCP
Send Continuous Pulses
3.5.3.3
Command
Deactivation
Request
Reset
Send Single Pulses
Send Continuous
Pulses
Receiver not
Synchronous
Activation Request
Activation Request
Loop
Activation Indication AI
Data Sheet
C/I Codes (NT)
AR
Abbr.
DR
RES
SSP
SCP
RSY
ARL
Code
0000
0001
0010
0011
0100
1000
1010
1100
Send Continuous Pulses.
Remark
DR - Deactivation Request. Initiates a complete
deactivation from the exchange side by
transmitting INFO 0. Unconditional command.
Reset of state machine. Transmission of Info0.
No reaction to incoming infos. RES is an
unconditional command.
Send Single Pulses.
Receiver is not synchronous
Activation Request. This command is used to
start an exchange initiated activation.
Activation request loop. The transceiver is
requested to operate an analog loop-back close
to the S/T-interface.
Synchronous receiver, i.e. activation
completed.
88
Description of Functional Blocks
PSB/PSF 21150
2003-01-30
IPAC-X
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