MM912H634CV1AER2 Freescale Semiconductor, MM912H634CV1AER2 Datasheet - Page 258

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MM912H634CV1AER2

Manufacturer Part Number
MM912H634CV1AER2
Description
64KS12 LIN2xLS/HS Isense
Manufacturer
Freescale Semiconductor
Series
-r
Datasheet

Specifications of MM912H634CV1AER2

Applications
Automotive
Core Processor
HCS12
Program Memory Type
FLASH (64 kB)
Controller Series
HCS12
Ram Size
6K x 8
Interface
LIN
Number Of I /o
-
Voltage - Supply
5.5 V ~ 27 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
48-LQFP Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Read: Anytime
Write: Anytime if APIFE=0. Else writes have no effect.
The period can be calculated as follows depending on logical value of the APICLK bit:
4.38.3.2.18
Freescale Semiconductor
APIR[15:0]
Field
15-0
APICLK=0: Period = 2*(APIR[15:0] + 1) * f
APICLK=1: Period = 2*(APIR[15:0] + 1) * Bus Clock period
Autonomous Periodical Interrupt Rate Bits — These bits define the time-out period of the API. See
the effect of the autonomous periodical interrupt rate bits.
1
Reserved Register CPMUTEST3
This reserved register is designed for factory test purposes only, and is not intended for
general user access. Writing to this register when in Special mode can alter the S12CPMU’s
functionality.
When f
APICLK
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
ACLK
Table 371. Selectable Autonomous Periodical Interrupt Periods
is trimmed to 10KHz.
Table 370. CPMUAPIRH / CPMUAPIRL Field Descriptions
APIR[15:0]
MM912_634 Advance Information, Rev. 4.0
FFFD
FFFE
FFFF
FFFD
FFFE
FFFF
0000
0001
0002
0003
0004
0005
0000
0001
0002
0003
0004
0005
.....
.....
ACLK
NOTE
Description
131068 * Bus Clock period
131070 * Bus Clock period
131072 * Bus Clock period
10 * Bus Clock period
12 * Bus Clock period
2 * Bus Clock period
4 * Bus Clock period
6 * Bus Clock period
8 * Bus Clock period
Selected Period
13106.8 ms
13107.0 ms
13107.2 ms
0.2 ms
0.4 ms
0.6 ms
0.8 ms
1.0 ms
1.2 ms
.....
.....
1
1
1
1
1
1
1
1
1
Table 371
for details of
258

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