MM912H634CV1AER2 Freescale Semiconductor, MM912H634CV1AER2 Datasheet - Page 322

• Manufacturer Part Number: MM912H634CV1AER2
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AER2

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.40.4.5.14
The Erase Verify D-Flash Section command will verify that a section of code in the D-Flash is erased. The Erase Verify D-Flash
Section command defines the starting point of the data to be verified and the number of words.
Upon clearing CCIF to launch the Erase Verify D-Flash Section command, the Memory Controller will verify the selected section
of D-Flash memory is erased. The CCIF flag will set after the Erase Verify D-Flash Section operation has completed.
4.40.4.5.15
The Program D-Flash operation programs one to four previously erased words in the D-Flash block. The Program D-Flash
operation will confirm that the targeted location(s) were successfully programmed upon completion.
Freescale Semiconductor
Register
Register
FSTAT
FSTAT
Field margin levels must only be used during verify of the initial factory programming .
Field margin levels can be used to check that Flash memory contents have adequate margin
for data retention at the normal level setting. If unexpected results are encountered when
checking Flash memory contents at field margin levels, the Flash memory contents should
be erased and reprogrammed.
Erase Verify D-Flash Section Command
Program D-Flash Command
A Flash word must be in the erased state before being programmed. Cumulative
programming of bits within a Flash word is not allowed.
Table 477. Erase Verify D-Flash Section Command FCCOB Requirements
MGSTAT1
MGSTAT0
MGSTAT1
MGSTAT0
ACCERR
ACCERR
Error Bit
Error Bit
FPVIOL
FPVIOL
Table 478. Erase Verify D-Flash Section Command Error Handling
CCOBIX[2:0]
Table 476. Set Field Margin Level Command Error Handling
000
001
010
Set if CCOBIX[2:0] != 001 at command launch
Set if command not available in current mode (see
Set if an invalid global address [17:16] is supplied
Set if an invalid margin level setting is supplied
None
None
None
Set if CCOBIX[2:0] != 010 at command launch
Set if command not available in current mode (see
Set if an invalid global address [17:0] is supplied
Set if a misaligned word address is supplied (global address [0] != 0)
Set if the requested section breaches the end of the D-Flash block
None
Set if any errors have been encountered during the read
Set if any non-correctable errors have been encountered during the read
MM912_634 Advance Information, Rev. 4.0
Global address [15:0] of the first word to be verified
0x10
Number of words to be verified
CAUTION
CAUTION
NOTE
FCCOB Parameters
Global address [17:16] to
identify the D-Flash block
Error Condition
Error Condition
Table
Table
445)
445)
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