Z16FMC64AG20EG Zilog, Z16FMC64AG20EG Datasheet - Page 66

Microcontrollers (MCU) 16BIT 64K FL 4K RAM 2UART 12CH 10BIT A/D

Z16FMC64AG20EG

Manufacturer Part Number
Z16FMC64AG20EG
Description
Microcontrollers (MCU) 16BIT 64K FL 4K RAM 2UART 12CH 10BIT A/D
Manufacturer
Zilog
Series
Z16FMCr
Datasheet

Specifications of Z16FMC64AG20EG

Processor Series
Z16FMC
Core
ZNEO
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
64 KB
Data Ram Size
4 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
46
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
LQFP-64
Development Tools By Supplier
Z16FMC28200KITG
Minimum Operating Temperature
- 40 C
Core Processor
ZNEO
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
46
Eeprom Size
-
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z16FMC64AG20EG
Manufacturer:
Zilog
Quantity:
160
Part Number:
Z16FMC64AG20EG
Manufacturer:
Zilog
Quantity:
10 000
Table 17. Port A–H Alternate Function High Registers (PxAFH)
Table 18. Port A–H Alternate Function Low Registers (PxAFL)
PS028702-1210
Bits
Field
RESET
R/W
ADDR
Bits
Field
RESET
R/W
ADDR
Port A–H Output Control Registers
Caution:
AFH[7]
AFL[7]
R/W
R/W
7
0
7
0
with each port pin, see the
alternate functions, it is recommended to use word data mode instructions to perform
simultaneous Writes to the port alternate function high and low registers.
Table 19. Alternate Function Enabling
Setting the bits in the Port A–H output control registers (see Table 20) to 1 configures the
specified port pins for open-drain operation. These registers affect the pins directly and as
a result, alternate functions are also affected. Enabling the I
configures the SCL and SDA pins as open-drain; independent of the setting in the output
control registers that have the SCL and SDA alternate functions.
FF_E105, FF_E115, FF_E125, FF_E135, FF_E155, FF_E165, FF_E175, FF_E195
Note: x indicates the register bits from 0 through 7.
AFH[x]
Do not enable alternate functions for GPIO port pins which do not also offer an
associated alternate function. Failure to follow this guideline will result in unde-
fined operation.
0
0
1
1
AFH[6]
AFL[6]
R/W
R/W
6
0
6
0
AFL[x] Priority
0
1
0
1
AFH[5]
AFL[5]
FF_E104, FF_E124, FF_E134, FF_E174
R/W
R/W
No Alternate Function Enabled
Alternate Function 1 Enabled
Alternate Function 2 Enabled
Alternate Function 3 Enabled
5
0
5
0
P R E L I M I N A R Y
GPIO Alternate Functions
AFH[4]
AFL[4]
R/W
R/W
4
0
4
0
AFH[3]
AFL[3]
R/W
R/W
Z16FMC Series Motor Control MCUs
3
0
3
0
section on page 39. When changing
AFH[2]
AFL[2]
R/W
R/W
2
2
0
2
0
General-Purpose Input/Output
C controller automatically
Product Specification
AFH[1]
AFL[1]
R/W
R/W
1
0
1
0
AFH[0]
AFL[0]
R/W
R/W
0
0
0
0
44

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