STA310 STMicroelectronics, STA310 Datasheet - Page 10

IC AUDIO DECODER 6+2CH 80-TQFP

STA310

Manufacturer Part Number
STA310
Description
IC AUDIO DECODER 6+2CH 80-TQFP
Manufacturer
STMicroelectronics
Type
Audio Decoderr
Datasheet

Specifications of STA310

Applications
HDTV, Players, Receivers, Set-Top Boxes
Voltage - Supply, Analog
2.5V
Voltage - Supply, Digital
2.5V
Mounting Type
Surface Mount
Package / Case
80-TQFP, 80-VQFP
Audio Codec Type
MP3 Decoder
No. Of Dacs
3
No. Of Input Channels
2
No. Of Output Channels
6
Adc / Dac Resolution
32bit
Sampling Rate
192kHz
Interface Type
I2C, Serial, Parallel
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-8856
STA310

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0
STA310
Post Decoding
The post decoding includes specific PCM processing: DC filter, de-emphasis filter, downsampling filter. These
filters can be independently enabled or disabled through the register DWSMODE.
It provides also a Pro Logic decoder, which is described in detail in a next section.
Bass Redirection
This stage redirects the low frequency signals to the subwoofer.
The subwoofer is extracted from the other channels (L, R, C, Ls, Rs, LFe). There are six possible configurations
to extract the subwoofer channel, which can be selected thanks to the OCFG register.
Volume and Balance Control
The volume is a master volume (no independent control for each channel). It is controlled by the PCMSCALE
register, which enables to attenuate the signals by steps of 2dB.
Two balance controls are available: one for Left/Right channels, one for Left Surround/Right Surround channels.
They are configurable by means of registers BAL_LR (Left-Right Balance) and BAL_SUR (Left Surround-Right
Surround Balance), which provide attenuation of signals by steps of 0.5dB.
4
4.1 Reset
The STA310 can be reset either by a hardware reset or by a software reset:
Some information concerning the post-processing are anywayt of date after a soft-reset
Note: 1. The chip must be soft reset before changing any configuration register.
10/90
- The hardware reset is sent when the pin RESET is activated low during at least 60ns. This is equiv-
- The software reset is sent when the register SOFTRESET is written to 1 (the register is automatically
OPERATION
alent to a power-on reset.
This resets all the configuration registers, i.e. PLL registers (PLLSYS, PLLPCM), Interrupt registers
(INTE, INT, ERROR), interface registers (SIN_SETUP, CAN_SETUP) and command registers
(SOFTRESET, RUN, PLAY, MUTE, SKIP_FRAME, REPEAT_FRAME).
reset once the software reset is performed). It resets only the interrupt related registers (INTE, INT,
ERROR) and the command registers (SOFTRESET, RUN, PLAY, MUTE, SKIP_FRAME,
REPEAT_FRAME). All other decoding configurations are not changed by softreset.

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