STA310 STMicroelectronics, STA310 Datasheet - Page 85

• Manufacturer Part Number: STA310
• Description: IC AUDIO DECODER 6+2CH 80-TQFP
• Manufacturer: STMicroelectronics
• Type: Audio Decoderr

Specifications of STA310

• Applications: HDTV, Players, Receivers, Set-Top Boxes
• Voltage - Supply, Analog: 2.5V
• Voltage - Supply, Digital: 2.5V
• Mounting Type: Surface Mount
• Package / Case: 80-TQFP, 80-VQFP
• Audio Codec Type: MP3 Decoder
• No. Of Dacs: 3
• No. Of Input Channels: 2
• No. Of Output Channels: 6
• Adc / Dac Resolution: 32bit
• Sampling Rate: 192kHz
• Interface Type: I2C, Serial, Parallel
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8856; STA310

MLP_STATUS1
MLP status 1 register
Address : 0x77
Type: RO
Software Reset: NC
Hardware Reset: UND
Description:
This status register contains the channel assignment.
MLP_STATUS2
MLP status 2 register
Address: 0x78
Type: RO
Software Reset: NC
Hardware Reset: UND
Description:
This status register contains the number of sub-
streams present in the audio frame.
MLP_STATUS3
MLP status 3 register
Address: : 0x79
Type: RO
Software Reset: NC
Hardware Reset: UND
CH_ASS
IGN[4:0]
Reserved
Bitfield
7
7
7
Reserved
6
Reserved
6
6
This gives the channel assignment:
See "DVD Specifications for Read-Only
Disc", Part 4 AUDIO SPECIFICATIONS,
Version 1.0, March 1999, Table C.1-1.
5
5
5
4
4
4
NSUBSTR[3:0]
Description
3
CH_ASSIGN[4:0]
3
3
SUBSTR_CODE[3:0]
2
2
2
1
1
1
0
0
0
Description:
This status register contains the sub-stream informa-
tion codes..
9.25 De-emphasis register
DEEMPH
De-emphasis
Address: 0xB5
Type: R/WS
Software Reset: NC
Hardware Reset: UND
Description:
This register is used in MPEG, DVD_LPCM or CDDA
modes; it is not supported in Dolby Digital.
In MPEG and DVD_LPCM modes, its register value
is extracted from the bitstream. When the emphasis
status changes (by setting bit DEM of the register),
an interrupt is generated. In CDDA mode, the register
value must be updated by the application.
The de-emphasis filter specified here is applied only
if bit DEM of the register is set.
9.26 Auxilliary outputs registers
VCR_MIX
VCR outputs
SUBSTR_CODE
[3:0]
D[1:0]
7
Bitfield
reserved
7
Bitfield
6
6
5
00: none, 01: 50/15µs, 10: reserved, 11:
CCITT J.17
STEREO PRL reserved COPY 3D_VCR
reserved
5
4
2-channel decoder:
bit0 = ’1’: sub-stream 0 is decoded
bit1 = ’1’: a simplified decoder can
be used for sub-stream 0
6-channel decoder:
bit2 = ’1’: sub-stream 0 is decoded
bit3 = ’1’: sub-stream 1 is decoded
4
3
Description
3
Description
2
2
1
1
STA310
D[1:0]
85/90
0
0