ISP1563BMUM ST-Ericsson Inc, ISP1563BMUM Datasheet - Page 51

• Manufacturer Part Number: ISP1563BMUM
• Description: IC USB HOST CTRL HI-SPD 128LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1563BMUM

• Applications: USB Host/Function Processor
• Interface: EHCI Interface
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 128-LQFP
• Mounting Type: Surface Mount
• For Use With: UM10066 - EVAL BRD FOR ISP1563
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ISP1563BM-T; ISP1563BM-T

Philips Semiconductors
Table 62:
Address: Value read from func0 or func1 of address 10h + 28h
[1]
Table 64:
Address: Value read from func0 or func1 of address 10h + 2Ch
9397 750 14224
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
The reserved bits should always be written with the reset value.
HcBulkHeadED - Host Controller Bulk Head Endpoint Descriptor register bit allocation
HcBulkCurrentED - Host Controller Bulk Current Endpoint Descriptor register bit allocation
11.1.11 HcBulkHeadED register
11.1.12 HcBulkCurrentED register
R/W
R/W
R/W
R/W
R/W
31
23
15
31
0
0
0
7
0
0
This is a four-byte register, and the bit allocation is given in
the physical address of the first ED of the bulk list.
Table 63:
Address: Value read from func0 or func1 of address 10h + 28h
This register contains the physical address of the current endpoint of the bulk list. The
endpoints are ordered according to their insertion to the list because the bulk list must be
served in a round-robin fashion. The bit allocation is given in
Bit
31 to 4
3 to 0
R/W
R/W
R/W
R/W
R/W
30
22
14
30
0
0
0
6
0
0
BHED[3:0]
HcBulkHeadED - Host Controller Bulk Head Endpoint Descriptor register bit
description
Symbol
BHED[27:0]
reserved
R/W
R/W
R/W
R/W
R/W
29
21
13
29
0
0
0
5
0
0
Rev. 01 — 14 July 2005
Description
Bulk Head ED: The Host Controller traverses the bulk list starting
with the HcBulkHeadED pointer. The content is loaded from HCCA
during the initialization of the Host Controller.
-
R/W
R/W
R/W
R/W
R/W
28
20
12
28
0
0
0
4
0
0
BHED[27:20]
BHED[19:12]
BCED[27:20]
BHED[11:4]
R/W
R/W
R/W
R/W
R/W
27
19
11
27
0
0
0
3
0
0
R/W
R/W
R/W
R/W
R/W
26
18
10
26
0
0
0
2
0
0
Table
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
HS USB PCI Host Controller
reserved
Table
62. The register contains
64.
[1]
R/W
R/W
R/W
R/W
R/W
25
17
25
0
0
9
0
1
0
0
ISP1563
R/W
R/W
R/W
R/W
R/W
51 of 107
24
16
24
0
0
8
0
0
0
0