ISP1563BMUM ST-Ericsson Inc, ISP1563BMUM Datasheet - Page 54

• Manufacturer Part Number: ISP1563BMUM
• Description: IC USB HOST CTRL HI-SPD 128LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1563BMUM

• Applications: USB Host/Function Processor
• Interface: EHCI Interface
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 128-LQFP
• Mounting Type: Surface Mount
• For Use With: UM10066 - EVAL BRD FOR ISP1563
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ISP1563BM-T; ISP1563BM-T

Philips Semiconductors
[1]
Table 70:
Address: Value read from func0 or func1 of address 10h + 38h
9397 750 14224
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
The reserved bits should always be written with the reset value.
HcFmRemaining - Host Controller Frame Remaining register bit allocation
11.1.15 HcFmRemaining register
R/W
FRT
R/W
R/W
R/W
31
23
15
7
1
0
0
0
reserved
Table 69:
Address: Value read from func0 or func1 of address 10h + 34h
The HcFmRemaining register is a 14-bit down counter showing the bit time remaining in
the current frame.
Table 70
Bit
31
30 to 16
15 to 14
13 to 0
[1]
R/W
R/W
R/W
R/W
30
22
14
6
1
0
0
0
contains the bit allocation of this 4 B register.
Symbol
FIT
FSMPS[14:0]
reserved
FI[13:0]
HcFmInterval - Host Controller Frame Interval register bit description
R/W
R/W
R/W
R/W
29
21
13
5
0
0
0
0
Rev. 01 — 14 July 2005
Description
Frame Interval Toggle: The HCD toggles this bit whenever it loads a
new value to Frame Interval.
FS Largest Data Packet: This field specifies the value that is loaded
into the largest data packet counter at the beginning of each frame.
The counter value represents the largest amount of data in bits that
can be sent or received by the Host Controller in a single transaction at
any given time, without causing a scheduling overrun. The field value
is calculated by the HCD.
-
Frame Interval: This specifies the interval between two consecutive
SOFs in bit times. The nominal value is set to 11,999. The HCD should
store the current value of this field before resetting the Host Controller
to reset this field to its nominal value. The HCD can then restore the
stored value on completing the reset sequence.
R/W
R/W
R/W
R/W
28
20
12
4
1
0
0
0
reserved
FI[7:0]
reserved
[1]
R/W
R/W
R/W
R/W
27
19
11
3
1
0
0
0
FR[13:8]
[1]
R/W
R/W
R/W
R/W
26
18
10
2
1
0
0
0
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
HS USB PCI Host Controller
R/W
R/W
R/W
R/W
25
17
1
1
0
0
9
0
ISP1563
R/W
R/W
R/W
R/W
54 of 107
24
16
0
1
0
0
8
0