ISP1563BMUM ST-Ericsson Inc, ISP1563BMUM Datasheet

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ISP1563BMUM

Manufacturer Part Number
ISP1563BMUM
Description
IC USB HOST CTRL HI-SPD 128LQFP
Manufacturer
ST-Ericsson Inc
Datasheet

Specifications of ISP1563BMUM

Applications
USB Host/Function Processor
Interface
EHCI Interface
Voltage - Supply
3 V ~ 3.6 V
Package / Case
128-LQFP
Mounting Type
Surface Mount
For Use With
UM10066 - EVAL BRD FOR ISP1563
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ISP1563BM-T
ISP1563BM-T

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ISP1563BMUM
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ISP1563BMUM
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
1. General description
The ISP1563 is a Peripheral Component Interconnect (PCI)-based, single-chip Universal
Serial Bus (USB) Host Controller. It integrates two Original USB Open Host Controller
Interface (OHCI) cores, one Hi-Speed USB Enhanced Host Controller Interface (EHCI)
core, and four transceivers that are compliant with Hi-Speed USB and Original USB. The
functional parts of the ISP1563 are fully compliant with Universal Serial Bus Specification
Rev. 2.0 , Open Host Controller Interface Specification for USB Rev. 1.0a , Enhanced Host
Controller Interface Specification for Universal Serial Bus Rev. 1.0 , PCI Local Bus
Specification Rev. 2.2 , and PCI Bus Power Management Interface Specification Rev. 1.1 .
The integrated high performance USB transceivers allow the ISP1563 to handle all
Hi-Speed USB transfer speed modes: high-speed (480 Mbit/s), full-speed (12 Mbit/s) and
low-speed (1.5 Mbit/s). The ISP1563 provides four downstream ports, allowing
simultaneous connection of USB devices at different speeds.
The ISP1563 provides downstream port status indicators, green and amber LEDs, to
allow user-rich messages of the Root Hub downstream ports status, without requiring
detailed port information in the internal registers.
The ISP1563 is fully compatible with various operating system drivers, such as Microsoft
Windows standard OHCI and EHCI drivers that are present in Windows XP,
Windows 2000 and Red Hat Linux.
The ISP1563 directly interfaces to any 32-bit, 33 MHz PCI bus. Its PCI pins can source
3.3 V. The PCI interface fully complies with PCI Local Bus Specification Rev. 2.2 .
The ISP1563 is ideally suited for use in Hi-Speed USB host-enabled motherboards,
Hi-Speed USB host PCI add-on card applications, mobile applications, and embedded
solutions.
To facilitate motherboard development, the ISP1563 can use the available 48 MHz clock
signal to reduce the total cost of a solution. To reduce Electro-Magnetic Interference
(EMI), however, it is recommended that the 12 MHz crystal is used in PCI add-on card
designs.
ISP1563
Hi-Speed Universal Serial Bus PCI Host Controller
Rev. 01 — 14 July 2005
Product data sheet

Related parts for ISP1563BMUM

ISP1563BMUM Summary of contents

Page 1

ISP1563 Hi-Speed Universal Serial Bus PCI Host Controller Rev. 01 — 14 July 2005 1. General description The ISP1563 is a Peripheral Component Interconnect (PCI)-based, single-chip Universal Serial Bus (USB) Host Controller. It integrates two Original USB Open Host Controller ...

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Philips Semiconductors 2. Features ■ Complies with Universal Serial Bus Specification Rev. 2.0 ■ Supports data transfer at high-speed (480 Mbit/s), full-speed (12 Mbit/s) and low-speed (1.5 Mbit/s) ■ Two Original USB OHCI cores comply with Open Host Controller Interface ...

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Philips Semiconductors 4. Ordering information Table 1: Ordering information Type number Package Name Description plastic low profile quad flat package; 128 leads; body 14 × 14 × 1.4 mm ISP1563BM LQFP128 9397 750 14224 Product data sheet Rev. 01 — ...

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Philips Semiconductors 5. Block diagram 9397 750 14224 Product data sheet bus PCI MHz 33 32-bit, Rev. 01 — 14 July 2005 ISP1563 HS USB PCI Host Controller © Koninklijke Philips Electronics N.V. 2005. All rights reserved 107 ...

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Philips Semiconductors 6. Pinning information 6.1 Pinning Fig 2. Pin configuration. 6.2 Pin description Table 2: [1] Symbol PME# GNDD IRQ1 IRQ12 SEL2PORTS 5 V CC(I/O)_AUX A20OUT KBIRQ1 MUIRQ12 GNDA 9397 750 14224 Product data sheet 1 ISP1563BM 32 Pin ...

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Philips Semiconductors Table 2: [1] Symbol AUX1V8 V I(VAUX3V3) SMI# INTA# RST# GNDD PCICLK GNT# REQ# AD[31] V CC(I/O) AD[30] AD[29] AD[28] AD[27] V I(VREG3V3) GNDA REG1V8 GNDD AD[26] AD[25] 9397 750 14224 Product data sheet Pin description …continued Pin ...

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Philips Semiconductors Table 2: [1] Symbol AD[24] C/BE#[3] IDSEL V CC(I/O) AD[23] AD[22] AD[21] AD[20] AD[19] AD[18] GNDD AD[17] AD[16] C/BE#[2] FRAME# IRDY# TRDY# DEVSEL# V CC(I/O) STOP# 9397 750 14224 Product data sheet Pin description …continued Pin Type Description ...

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Philips Semiconductors Table 2: [1] Symbol CLKRUN# REG1V8 PERR# SERR# GNDA PAR C/BE#[1] GNDD AD[15] AD[14] AD[13] AMB4 GRN4 AD[12] AD[11] V CC(I/O) AD[10] AD[9] 9397 750 14224 Product data sheet Pin description …continued Pin Type Description 52 I/O PCI ...

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Philips Semiconductors Table 2: [1] Symbol REG1V8 AD[8] C/BE#[0] GNDA AD[7] AD[6] GNDD AD[5] AD[4] AD[3] AD[2] AD[1] AD[0] V CC(I/O) GNDA AUX1V8 XTAL1 XTAL2 GNDD AMB3 GRN3 9397 750 14224 Product data sheet Pin description …continued Pin Type Description ...

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Philips Semiconductors Table 2: [1] Symbol AMB2 GRN2 AMB1 GRN1 V CC(I/O)_AUX OC1_N PWE1_N GNDA RREF GNDA DM1 GNDA DP1 V DDA_AUX OC2_N PWE2_N GNDA DM2 GNDA DP2 V DDA_AUX OC3_N PWE3_N OC4_N 9397 750 14224 Product data sheet Pin ...

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Philips Semiconductors Table 2: [1] Symbol PWE4_N GNDA DM3 GNDA DP3 V DDA_AUX SEL48M SCL SDA GNDA DM4 GNDA DP4 V DDA_AUX [1] Symbol names ending with ‘#’, for example, NAME#, represent active LOW signals for PCI pins. Symbol names ...

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Philips Semiconductors 7. Functional description 7.1 OHCI Host Controller An OHCI Host Controller transfers data to devices at the Original USB defined bit rate of 12 Mbit/s or 1.5 Mbit/s. 7.2 EHCI Host Controller The EHCI Host Controller transfers data ...

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Philips Semiconductors 7.7 Legacy support The ISP1563 provides legacy support for a USB keyboard and mouse. This means that the keyboard and mouse should be able to work even before the Operating System (OS) boot-up, with the necessary support in ...

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Philips Semiconductors ( Fig 4. Power supply connection. 8. PCI 8.1 PCI interface The PCI interface has three functions. The first function (#0) and the second function (#1) are for the OHCI Host Controllers, and the third function ...

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Philips Semiconductors Additionally, function #0 provides legacy keyboard and mouse support to comply with Open Host Controller Interface Specification for USB Rev. 1.0a . Each function has its own configuration space. The PCI enumerator should allocate the memory address space ...

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Philips Semiconductors Table 3: PCI configuration space registers of OHCI1, OHCI2 and EHCI Address Bits Bits PCI configuration header registers 00h Device ID[15:0] 04h Status[15:0] 08h Class Code[23:0] 0Ch reserved Header Type[7:0] 10h Base ...

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Philips Semiconductors 8.2.1.1 Vendor ID register This read-only register identifies the manufacturer of the device. PCI Special Interest Group (PCI-SIG) assigns valid vendor identifiers to ensure the uniqueness of the identifier. The bit description is shown in Table 4: Legend: ...

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Philips Semiconductors Table 7: Bit Symbol reserved 9 FBBE 8 SERRE 7 SCTRL 6 PER 5 VGAPS 4 MWIE 3 SC 9397 750 14224 Product data sheet Command register (address 04h) bit description Description - Fast Back-to-Back ...

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Philips Semiconductors Table 7: Bit Symbol IOS 8.2.1.4 Status register The Status register read-only register used to record status information on PCI bus-related events. For bit allocation, see Table 8: Status ...

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Philips Semiconductors Table 9: Bit Symbol 12 RTA 11 STA DEVSELT [1:0] 8 MDPE 7 FBBC 6 reserved 5 66MC reserved 8.2.1.5 Revision ID register This 1 B read-only register indicates a ...

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Philips Semiconductors 8.2.1.6 Class Code register Class Code is a 24-bit read-only register used to identify the generic function of the device, and in some cases, a specific register-level programming interface. shows the bit allocation of the register. The Class ...

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Philips Semiconductors This field must be initialized to logic 0 on activation of RST#. description of the CacheLine Size register. Table 13: Legend: * reset value Bit Symbol CLS[7:0] 8.2.1.8 Latency Timer register This register specifies, in ...

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Philips Semiconductors The bit description of the BAR 0 register is given in Table 17: Legend: * reset value Bit Symbol BAR 0[31:0] R/W 8.2.1.11 Subsystem Vendor ID register The Subsystem Vendor ID register is used to ...

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Philips Semiconductors Table 20: Legend: * reset value Bit Symbol CP[7:0] 8.2.1.14 Interrupt Line register This register used to communicate interrupt line routing information. This register must be implemented by any device or ...

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Philips Semiconductors The Max_Lat register bit description is given in Table 24: Legend: * reset value Bit Symbol MAX_LAT[7:0] [ 2Ah for OHCI1 and OHCI2 10h for EHCI. 8.2.1.17 TRDY Timeout register This ...

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Philips Semiconductors Table 26: Legend: * reset value Bit Symbol SBRN[7:0] 8.2.2.2 FLADJ register This feature is used to adjust any offset from the clock source that generates the clock that drives the SOF counter. When a ...

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Philips Semiconductors established by BIOS initializing this register to a system-specific value. The system software uses the information in this register when enabling devices and ports for remote wake-up. Table 29: Legend: * reset value Bit Symbol ...

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Philips Semiconductors 8.2.3.3 PMC register The Power Management Capabilities (PMC) register register, and the bit allocation is given in function related to power management. Table 33: PMC - Power Management Capabilities register bit allocation Address: Value ...

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Philips Semiconductors Table 34: Address: Value read from address 34h + 2h Bit Symbol AUX_C[2:0] 5 DSI 4 reserved 3 PMI VER[2:0] The logic level of the AMB4 pin at power-on determines the default ...

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Philips Semiconductors 8.2.3.4 PMCSR register The Power Management Control/Status (PMCSR) register register used to manage the Power Management State of the PCI function, as well as to allow and monitor Power Management Events (PMEs). The bit ...

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Philips Semiconductors Table 36: Address: Value read from address 34h + 4h Bit Symbol 8 PMEE reserved PS[1:0] 8.2.3.5 PMCSR_BSE register The PMCSR PCI-to-PCI Bridge Support Extensions (PMCSR_BSE) register supports PCI bridge-specific functionality and ...

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Philips Semiconductors Table 38: Address: Value read from address 34h + 6h Bit Table 39: Originating device’s bridge PM state hot D3 cold [1] PM: Power Management. 8.2.3.6 Data register The ...

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Philips Semiconductors C-bus interface 2 A simple I product ID and some other configuration bits from an external EEPROM. 2 The I C-bus interface is for bidirectional communication between ICs using two serial bus wires: SDA (data) ...

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Philips Semiconductors The slave address that the ISP1563 uses to access the EEPROM is 1010000b. Page mode addressing is not supported. Therefore, pins A0, A1 and A2 of the EEPROM must be connected to ground (logic 0). 9.3 Information loading ...

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Philips Semiconductors 10.2 USB bus states Reset state — When the USB bus is in the reset state, the USB system is stopped. Operational state — When the USB bus is in the active state, the USB system is operating ...

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Philips Semiconductors 9397 750 14224 Product data sheet Rev. 01 — 14 July 2005 ISP1563 HS USB PCI Host Controller © Koninklijke Philips Electronics N.V. 2005. All rights reserved 107 ...

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Philips Semiconductors 9397 750 14224 Product data sheet Rev. 01 — 14 July 2005 ISP1563 HS USB PCI Host Controller © Koninklijke Philips Electronics N.V. 2005. All rights reserved 107 ...

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Philips Semiconductors For the OHCI Host Controller, these registers are divided into two types: one set of operational registers for the USB operation and one set of legacy support registers for the legacy keyboard and mouse operation. For the Enhanced ...

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Philips Semiconductors Table 43: Address: Value read from func0 or func1 of address 10h + 00h Bit 11.1.2 HcControl register This register defines the operating modes for the Host Controller. All the fields ...

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Philips Semiconductors Table 45: Address: Value read from func0 or func1 of address 10h + 04h Bit Symbol reserved 10 RWE 9 RWC HCFS[1:0] 5 BLE 9397 750 14224 Product data sheet ...

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Philips Semiconductors Table 45: Address: Value read from func0 or func1 of address 10h + 04h Bit Symbol 4 CLE PLE CBSR[1:0] 11.1.3 HcCommandStatus register The HcCommandStatus register is used by the Host Controller ...

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Philips Semiconductors Table 46: HcCommandStatus - Host Controller Command Status register bit allocation Address: Value read from func0 or func1 of address 10h + 08h Bit 31 30 Symbol Reset 0 0 Access R/W R/W Bit 23 22 Symbol Reset ...

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Philips Semiconductors Table 47: Bit 11.1.4 HcInterruptStatus register This register that provides the status of the events that cause hardware interrupts. The bit allocation of the register is given in Controller sets the ...

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Philips Semiconductors Bit 23 22 Symbol Reset 0 0 Access R/W R/W Bit 15 14 Symbol Reset 0 0 Access R/W R/W Bit 7 6 [1] Symbol reserved RHSC Reset 0 0 Access R/W R/W [1] The reserved bits should ...

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Philips Semiconductors 11.1.5 HcInterruptEnable register Each enable bit in the HcInterruptEnable register corresponds to an associated interrupt bit in the HcInterruptStatus register. The HcInterruptEnable register is used to control which events generate a hardware interrupt. A hardware interrupt is requested ...

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Philips Semiconductors Table 51: Bit 11.1.6 HcInterruptDisable register Each disable bit in the HcInterruptDisable register corresponds to an associated interrupt bit in the HcInterruptStatus register. The HcInterruptDisable register is coupled with the HcInterruptEnable ...

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Philips Semiconductors Bit 15 14 Symbol Reset 0 0 Access R/W R/W Bit 7 6 [1] Symbol reserved RHSC Reset 0 0 Access R/W R/W [1] The reserved bits should always be written with the reset value. Table 53: Address: ...

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Philips Semiconductors 11.1.7 HcHCCA register The HcHCCA register contains the physical address of the Host Controller Communication Area (HCCA). The bit allocation is given in determines the alignment restrictions by writing all 1s to HcHCCA and reading the content of ...

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Philips Semiconductors Bit 23 22 Symbol Reset 0 0 Access R R Bit 15 14 Symbol Reset 0 0 Access R R Bit 7 6 Symbol PCED[3:0] Reset 0 0 Access R R Table 57: Address: Value read from func0 ...

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Philips Semiconductors Table 59: Address: Value read from func0 or func1 of address 10h + 20h Bit 11.1.10 HcControlCurrentED register The HcControlCurrentED register contains the physical address of the current ED of the control ...

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Philips Semiconductors 11.1.11 HcBulkHeadED register This is a four-byte register, and the bit allocation is given in the physical address of the first ED of the bulk list. Table 62: HcBulkHeadED - Host Controller Bulk Head Endpoint Descriptor register bit ...

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Philips Semiconductors Bit 23 22 Symbol Reset 0 0 Access R/W R/W Bit 15 14 Symbol Reset 0 0 Access R/W R/W Bit 7 6 Symbol BCED[3:0] Reset 0 0 Access R/W R/W [1] The reserved bits should always be ...

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Philips Semiconductors Bit 15 14 Symbol Reset 0 0 Access R/W R/W Bit 7 6 Symbol Reset 0 0 Access R/W R/W [1] The reserved bits should always be written with the reset value. Table 67: Address: Value read from ...

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Philips Semiconductors Bit 7 6 Symbol Reset 1 1 Access R/W R/W [1] The reserved bits should always be written with the reset value. Table 69: Address: Value read from func0 or func1 of address 10h + 34h Bit Symbol ...

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Philips Semiconductors Bit 7 6 Symbol Reset 0 0 Access R/W R/W [1] The reserved bits should always be written with the reset value. Table 71: Address: Value read from func0 or func1 of address 10h + 38h Bit Symbol ...

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Philips Semiconductors Table 73: Address: Value read from func0 or func1 of address 10h + 3Ch Bit 11.1.17 HcPeriodicStart register This register has a 14-bit programmable value that determines when is the earliest time ...

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Philips Semiconductors 11.1.18 HcLSThreshold register This register contains an 11-bit value used by the Host Controller to determine whether to commit to the transfer of a maximum low-speed packet before EOF. Neither the Host Controller nor the ...

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Philips Semiconductors Bit 23 22 Symbol Reset 0 0 Access R/W R/W Bit 15 14 Symbol reserved Reset 0 0 Access R/W R/W Bit 7 6 Symbol Reset 0 0 Access R R [1] The reserved bits should always be ...

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Philips Semiconductors Table 79: Address: Value read from func0 or func1 of address 10h + 48h Bit Symbol 9 NPS 8 PSM NDP[7:0] Number Downstream Ports: These bits specify the number of downstream 11.1.20 HcRhDescriptorB register The ...

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Philips Semiconductors Table 81: Address: Value read from func0 or func1 of address 10h + 4Ch Bit Symbol PPCM[15:0] Port Power Control Mask: Each bit indicates whether a port is affected DR[15:0] 11.1.21 HcRhStatus ...

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Philips Semiconductors Table 83: Address: Value read from func0 or func1 of address 10h + 50h Bit 11.1.22 HcRhPortStatus[4:1] register The HcRhPortStatus[4:1] register is used to control and ...

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Philips Semiconductors Table 84: HcRhPortStatus[4:1] - Host Controller Root Hub Port Status[4:1] register bit allocation Address: Value read from func0 or func1 of address 10h + 54h Bit 31 30 Symbol Reset 0 0 Access R/W R/W Bit 23 22 ...

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Philips Semiconductors Table 85: Address: Value read from func0 or func1 of address 10h + 54h Bit Symbol 17 PESC 16 CSC reserved 9 LSDA 8 PPS reserved 9397 750 14224 Product data sheet ...

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Philips Semiconductors Table 85: Address: Value read from func0 or func1 of address 10h + 54h Bit Symbol 4 PRS 3 POCI 9397 750 14224 Product data sheet HcRhPortStatus[4:1] - Host Controller Root Hub Port Status[4:1] register bit description …continued ...

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Philips Semiconductors Table 85: Address: Value read from func0 or func1 of address 10h + 54h Bit Symbol 2 PSS 1 PES 0 CCS 9397 750 14224 Product data sheet HcRhPortStatus[4:1] - Host Controller Root Hub Port Status[4:1] register bit ...

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Philips Semiconductors 11.2 USB legacy support registers The ISP1563 supports legacy keyboard and mouse. Four operational registers are used to provide the legacy support. Each of these registers is located on a 32-bit boundary. The offset of these registers is ...

Page 67

Philips Semiconductors Bit 7 6 Symbol IRQ12A IRQ1A Reset 0 0 Access R/W R/W [1] The reserved bits should always be written with the reset value. Table 89: Address: Value read from func0 or func1 of address 10h + 100h ...

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Philips Semiconductors Table 90: HceInput - Host Controller Emulation Input register bit allocation Address: Value read from func0 or func1 of address 10h + 104h Bit 31 30 Symbol Reset 0 0 Access R/W R/W Bit 23 22 Symbol Reset ...

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Philips Semiconductors Bit 15 14 Symbol Reset 0 0 Access R/W R/W Bit 7 6 Symbol Reset 0 0 Access R/W R/W [1] The reserved bits should always be written with the reset value. Table 93: Address: Value read from ...

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Philips Semiconductors Table 95: Address: Value read from func0 or func1 of address 10h + 10Ch Bit Symbol reserved 7 PARITY 6 TIMEOUT 5 AUX_OUT_ FULL 4 INH_SW 3 CMD_DATA 2 FLAG 1 IN_FULL 0 OUT_FULL 11.3 ...

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Philips Semiconductors Bit 7 6 Symbol Reset 0 0 Access R R Table 97: Address: Value read from func2 of address 10h + 00h Bit Symbol HCIVERSION[15: reserved CAPLENGTH[7:0] 11.3.2 HCSPARAMS ...

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Philips Semiconductors Table 99: Address: Value read from func2 of address 10h + 04h Bit 9397 ...

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Philips Semiconductors 11.3.3 HCCPARAMS register The Host Controller Capability Parameters (HCCPARAMS) register register, and the bit allocation is given in Table 100: HCCPARAMS - Host Controller Capability Parameters register bit allocation Address: Value read from func2 ...

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Philips Semiconductors Table 101: HCCPARAMS - Host Controller Capability Parameters register bit Bit 11.3.4 HCSP-PORTROUTE register The HCSP-PORTROUTE (Companion Port Route Description) register is an optional read-only field that is valid only if PRR (bit ...

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Philips Semiconductors Bit 15 14 Symbol Reset 0 0 Access R/W R/W Bit 7 6 Symbol LHCR IAAD Reset 0 0 Access R/W R/W [1] The reserved bits should always be written with the reset value. Table 103: USBCMD - ...

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Philips Semiconductors Table 103: USBCMD - USB Command register bit description Address: Value read from func2 of address 10h + 20h Bit Symbol 5 ASE 4 PSE FLS[1:0] 1 HCRESET Host Controller Reset: This control bit is ...

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Philips Semiconductors Table 104: USBSTS - USB Status register bit allocation Address: Value read from func2 of address 10h + 24h Bit 31 30 Symbol Reset 0 0 Access R/W R/W Bit 23 22 Symbol Reset 0 0 Access R/W ...

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Philips Semiconductors Table 105: USBSTS - USB Status register bit description Address: Value read from func2 of address 10h + 24h Bit Symbol reserved 5 IAA 4 HSE 3 FLR 2 PCD 1 USBERRINT 0 USBINT 11.4.3 ...

Page 79

Philips Semiconductors Table 106: USBINTR - USB Interrupt Enable register bit allocation Address: Value read from func2 of address 10h + 28h Bit 31 30 Symbol Reset 0 0 Access R/W R/W Bit 23 22 Symbol Reset 0 0 Access ...

Page 80

Philips Semiconductors 11.4.4 FRINDEX register The Frame Index (FRINDEX) register is used by the Host Controller to index into the periodic frame list. The register updates every 125 µs; once each micro frame. Bits are used to ...

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Philips Semiconductors Table 109: FRINDEX - Frame Index register bit description Address: Value read from func2 of address 10h + 2Ch Bit Symbol FRINDEX [13:0] 11.4.5 PERIODICLISTBASE register The Periodic Frame List Base Address (PERIODLISTBASE) register contains ...

Page 82

Philips Semiconductors Bit 7 6 Symbol Reset 0 0 Access R/W R/W [1] The reserved bits should always be written with the reset value. Table 111: PERIODICLISTBASE - Periodic Frame List Base Address register bit description Address: Value read from ...

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Philips Semiconductors Table 113: ASYNCLISTADDR - Current Asynchronous List Address register bit description Address: Value read from func2 of address 10h + 38h Bit 11.4.7 CONFIGFLAG register The bit allocation of the Configure Flag ...

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Philips Semiconductors • No device connected • Port disabled. If the port has power control, software cannot change the state of the port until it sets the port power bits. Software must not attempt to change the state of the ...

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Philips Semiconductors Table 117: PORTSC Port Status and Control register bit Address: Value read from func2 of address 10h + 64h + (4 × Port Number − 1) where Port Number ...

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Philips Semiconductors Table 117: PORTSC Port Status and Control register bit Address: Value read from func2 of address 10h + 64h + (4 × Port Number − 1) where Port Number ...

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Philips Semiconductors Table 117: PORTSC Port Status and Control register bit Address: Value read from func2 of address 10h + 64h + (4 × Port Number − 1) where Port Number ...

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Philips Semiconductors 12. Power consumption Table 118 shows the power consumption. Table 118: Power consumption when SEL2PORTS is LOW Power pins group Total current on pins CC(I/O)_AUX I(VAUX3V3) DDA_AUX [ CC(I/O) ...

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Philips Semiconductors 13. Limiting values Table 120: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage to I/O pins CC(I/O) V supply voltage to internal regulator I(VREG3V3) V auxiliary supply voltage to ...

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Philips Semiconductors 15. Static characteristics 2 Table 122: Static characteristics − 40 ° +85 ° C; unless otherwise specifi CC(I/O) amb Symbol Parameter V HIGH-level input voltage IH ...

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Philips Semiconductors Table 125: Static characteristics: USB interface block (pins DM1 to DM4 and DP1 to DP4) = − 40 ° +85 ° C; unless otherwise specifi DDA_AUX amb Symbol ...

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Philips Semiconductors 16. Dynamic characteristics Table 126: Dynamic characteristics: system clock timing Symbol Parameter Reset t pulse width on pin RESET_N crystal oscillator running W(RESET_N) Crystal oscillator f PCI clock clk [1] external clock input R series resistance S C ...

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Philips Semiconductors Table 129: Dynamic characteristics: high-speed source electrical characteristics = − 40 ° +85 ° C; unless otherwise specifi DDA_AUX amb Symbol Parameter Clock timing t high-speed data rate ...

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Philips Semiconductors 16.1 Timing Table 132: PCI clock and I/O timing Symbol Parameter PCI clock timing; see Figure 7 T PCICLK cycle time cyc(PCICLK) t PCICLK HIGH time HIGH(PCICLK) t PCICLK LOW time LOW(PCICLK) SR PCICLK slew rate PCICLK SR ...

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Philips Semiconductors CLK INPUT DELAY Fig 8. PCI input timing. CLK OUTPUT DELAY OUTPUT Fig 9. PCI output timing. t USBbit +3.3 V crossover point differential data lines the bit duration time (USB data). USBbit t ...

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Philips Semiconductors 17. Package outline LQFP128: plastic low profile quad flat package; 128 leads; body 1 pin 1 index 128 DIMENSIONS (mm are the original ...

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Philips Semiconductors 18. Soldering 18.1 Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages ...

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Philips Semiconductors – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, ...

Page 99

Philips Semiconductors [4] These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, ...

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Philips Semiconductors 20. References [1] Universal Serial Bus Specification Rev. 2.0 [2] Open Host Controller Interface Specification for USB Rev. 1.0a [3] Enhanced Host Controller Interface Specification for Universal Serial Bus Rev. 1.0 [4] PCI Local Bus Specification Rev. 2.2 ...

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Philips Semiconductors 22. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...

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Philips Semiconductors 27. Tables Table 1: Ordering information . . . . . . . . . . . . . . . . . . . . .3 Table 2: Pin description . . . . . . . ...

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Philips Semiconductors Interrupt Disable register bit description . . . . .47 Table 54: HcHCCA - Host Controller Communication Area register bit allocation . . . . . . . . . . . . . . . .48 Table ...

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Philips Semiconductors Parameters register bit allocation . . . . . . . . . .73 Table 101:HCCPARAMS - Host Controller Capability Parameters register bit description . . . . . . . . .73 Table 102:USBCMD - USB Command ...

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Philips Semiconductors 28. Figures Fig 1. Block diagram Fig 2. Pin configuration. ...

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Philips Semiconductors 29. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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Philips Semiconductors 11.3.1 CAPLENGTH/HCIVERSION register . . . . . . . 70 11.3.2 HCSPARAMS register . . . . . . . . . . . . . . . . . . 71 11.3.3 HCCPARAMS register . . ...

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