STM3220G-SK/IAR STMicroelectronics, STM3220G-SK/IAR Datasheet - Page 98

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STM3220G-SK/IAR

Manufacturer Part Number
STM3220G-SK/IAR
Description
DEV KIT STM32F207ZG KICKSTART
Manufacturer
STMicroelectronics
Series
IAR Kickstartr
Type
MCUr
Datasheets

Specifications of STM3220G-SK/IAR

Contents
Hardware, Software and Documentation
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
STM32F207
Other names
497-11404
Electrical characteristics
98/163
Table 47.
1. Guaranteed by design, not tested in production.
2. f
3. The maximum hold time of the Start condition has only to be met if the interface does not stretch the low
4. The device must internally provide a hold time of at least 300ns for the SDA signal in order to bridge the
t
w(STO:STA)
Symbol
t
t
t
t
t
w(SCLH)
w(SCLL)
t
su(SDA)
t
t
su(STO)
achieve the maximum fast mode I
period of SCL signal.
undefined region of the falling edge of SCL.
t
t
t
su(STA)
h(SDA)
PCLK1
r(SDA)
h(STA)
r(SCL)
f(SDA)
f(SCL)
C
b
must be higher than 4 MHz to achieve the fast mode I
SCL clock low time
SCL clock high time
SDA setup time
SDA data hold time
SDA and SCL rise time
SDA and SCL fall time
Start condition hold time
Repeated Start condition
setup time
Stop condition setup time
Stop to Start condition time
(bus free)
Capacitive load for each bus
line
I
2
C characteristics
Parameter
2
Doc ID 15818 Rev 6
C frequency.
Standard mode I
Min
250
0
4.7
4.0
4.0
4.7
4.0
4.7
(3)
-
-
-
2
C frequency. It must be higher than 4 MHz to
1000
Max
300
400
-
-
-
-
-
-
-
-
2
C
(1)
STM32F205xx, STM32F207xx
20 + 0.1C
Fast mode I
Min
100
0
1.3
0.6
0.6
0.6
0.6
1.3
(4)
-
-
b
2
C
900
Max
300
300
400
(1)(2)
-
-
-
-
-
-
-
(3)
Unit
μs
μs
pF
µs
ns
µs

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