SDKZSPF LSI, SDKZSPF Datasheet - Page 186

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SDKZSPF

Manufacturer Part Number
SDKZSPF
Description
Manufacturer
LSI
Datasheet

Specifications of SDKZSPF

Lead Free Status / Rohs Status
Supplier Unconfirmed
zsim{12}> show reg gpr
zsim{14}>
zsim{12}> exit
***(info) Exiting ZSIM.
%_
8-44
(28)20e5:6b0c:1:stdu
(27)20e4:2d68:1:movl
(26)20dc:1004:1:call
------------------------------------------ R(1:1)
(25)20db:a063:1:add
------------------------------------------ E(2:2)
(24)20da:725c:1:ld
(23)20d9:bc6c:1:mov
------------------------------------------ W(2:2)
(22)20d8:6fdc:1:stu
(21)20d7:b91d:1:mov
r10 = 0x0000
r12 = 0xf7f8
r14 = 0x0000
r0 = 0x0000
r2 = 0x0000
r4 = 0x0001
r6 = 0xf7f8
r8 = 0x0000
Execution halts when a breakpoint is reached, the maximum cycle count
is reached, or a system halt occurs. A system halt refers to the halt mode
as defined by the power level (lvl) field in the DSP’s %smode control
register.
A simulation session is terminated with the exit command.
ZSP SDK Cycle-Accurate Simulator
Copyright © 1999-2003 by LSI Logic Corporation. All rights reserved.
r0.e, r12, -2
r13, 0x68
0x20e4
r6, 0x3
r5, r12, 2
r6, r12
r13, r12, -1
r13, rpc
r11 = 0x0000
r13 = 0x2017
r15 = 0x0000
r1 = 0x0000
r3 = 0x0000
r5 = 0x0001
r7 = 0x0000
r9 = 0x0000