SDKZSPF LSI, SDKZSPF Datasheet - Page 233

no-image

SDKZSPF

Manufacturer Part Number
SDKZSPF
Description
Manufacturer
LSI
Datasheet

Specifications of SDKZSPF

Lead Free Status / Rohs Status
Supplier Unconfirmed
ZSP400 is the first generation ZSP architecture. This setting works for all
ASSPs based on this core (for example, the LSI402ZX, LSI403Z, and
LSI403LP).
ZSPG2, the next generation architecture in the ZSP roadmap, has many
new instructions, new resources, and a bigger address range. It is
assembly compatible with the ZSP400.
The dual mac core called ZSP500 is based on the ZSPG2 architecture.
It supports a 24-bit address range and is a four issue machine. The
simulators in the toolchain support the ZSP500 in a cycle accurate and
instruction accurate modes. Refer to the ZSP400 and ZSPG2 manuals
for more information. Select G2 to compile for ZSP500 or G1/G2 to
compile ZSP400 source code for G2.
Figure 11.6
Compiler Settings
Figure 11.7
shows the Assembler settings tab.
Project Settings
11-11
Copyright © 1999-2003 by LSI Logic Corporation. All rights reserved.