LAXP2-17E-5QN208E Lattice, LAXP2-17E-5QN208E Datasheet - Page 56

• Manufacturer Part Number: LAXP2-17E-5QN208E
• Description: IC FPGA AUTO 17K LUTS 208-PQFP
• Manufacturer: Lattice

Specifications of LAXP2-17E-5QN208E

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
RSDS
The LA-LatticeXP2 devices support differential RSDS standard. This standard is emulated using complementary
LVCMOS outputs in conjunction with a parallel resistor across the driver outputs. The RSDS input standard is sup-
ported by the LVDS differential input buffer. The scheme shown in Figure 3-4 is one possible solution for RSDS
standard implementation. Resistor values in Figure 3-4 are industry standard values for 1% resistors.
Figure 3-4. RSDS (Reduced Swing Differential Standard)
Table 3-4. RSDS DC Conditions
8mA
8mA
V CCIO = 2.5V
V CCIO = 2.5V
V
Z
R
R
R
V
V
V
V
Z
I
1. For input buffer, see LVDS table.
Parameter
DC
OUT
BACK
CCIO
OH
OL
OD
CM
S
P
T
On-chip
(+/-5%)
(+/-5%)
Output Driver Supply (+/-5%)
Driver Impedance
Driver Series Resistor (+/-1%)
Driver Parallel Resistor (+/-1%)
Receiver Termination (+/-1%)
Output High Voltage (After R
Output Low Voltage (After R
Output Differential Voltage (After R
Output Common Mode Voltage
Back Impedance
DC Output Current
1
Over Recommended Operating Conditions
R
R
S
S
Off-chip
= 294 ohms
= 294 ohms
(+/-1%)
(+/-1%)
Description
R
P
Zo = 100 ohm differential
= 121 ohms
(+/-1%)
3-12
Transmission line,
P
P
)
)
P
)
R
T
DC and Switching Characteristics
= 100 ohms
(+/-1%)
LA-LatticeXP2 Family Data Sheet
Typical
101.5
2.50
1.35
1.15
0.20
1.25
3.66
294
121
100
20
Off-chip
Units
mA
¾
¾
¾
¾
¾
V
V
V
V
V
On-chip
+
-